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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09905185
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Filing Dt:
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07/13/2001
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Title:
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PROGRAMMABLE PAGE TABLE ACCESS
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Patent #:
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Issue Dt:
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06/06/2006
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Application #:
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09924755
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Filing Dt:
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08/07/2001
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Publication #:
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Pub Dt:
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04/04/2002
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Title:
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METHOD AND APPARATUS FOR PREVENTING UNDESIRABLE PACKET DOWNLOAD WITH PENDING READ/WRITE OPERATIONS IN DATA PACKET PROCESSING
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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09925314
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Filing Dt:
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08/10/2001
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Publication #:
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Pub Dt:
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02/27/2003
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Title:
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SYSTEM AND METHOD OF CONTROLLING SOFTWARE DECOMPRESSION THROUGH EXCEPTIONS
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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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09927129
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Filing Dt:
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08/10/2001
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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CONTEXT SELECTION AND ACTIVATION MECHANISM FOR ACTIVATING ONE OF A GROUP OF INACTIVE CONTEXTS IN A PROCESSOR CORE FOR SERVICING INTERRRUPTS
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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09933934
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Filing Dt:
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08/20/2001
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Publication #:
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Pub Dt:
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03/28/2002
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Title:
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METHOD FOR ALLOCATING MEMORY SPACE FOR LIMITED PACKET HEAD AND/OR TAIL GROWTH
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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09935446
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Filing Dt:
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08/22/2001
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Publication #:
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Pub Dt:
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02/27/2003
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Title:
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METHOD AND APPARATUS FOR PREDICTING CHARACTERISTICS OF INCOMING DATA PACKETS TO ENABLE SPECULATIVE PROCESSING TO REDUCE PROCESSOR LATENCY
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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09948919
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Filing Dt:
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09/07/2001
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Publication #:
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Pub Dt:
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05/09/2002
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Title:
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EXTENDED INSTRUCTION SET FOR PACKET PROCESSING APPLICATIONS
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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09954290
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Filing Dt:
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09/11/2001
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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FUNCTIONAL VALIDATION OF A PACKET MANAGEMENT UNIT
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Patent #:
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Issue Dt:
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12/26/2006
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Application #:
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09964827
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Filing Dt:
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09/25/2001
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Publication #:
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Pub Dt:
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02/16/2006
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Title:
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METHOD AND APPARATUS FOR OVERFLOWING DATA PACKETS TO A SOFTWARE-CONTROLLED MEMORY WHEN THEY DO NOT FIT INTO A HARDWARE-CONTROLLED MEMORY
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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09977084
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Filing Dt:
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10/12/2001
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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METHOD AND APPARATUS FOR BINDING SHADOW REGISTERS TO VECTORED INTERRUPTS
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10071547
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02/08/2002
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Publication #:
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07/18/2002
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Title:
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INTERSTREAM CONTROL AND COMMUNICATIONS FOR MULTI-STREAMING DIGITAL PROCESSORS
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10135004
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Filing Dt:
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04/26/2002
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Publication #:
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Pub Dt:
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10/30/2003
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Title:
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METHOD AND APPARATUS FOR REDIRECTION OF OPERATIONS BETWEEN INTERFACES
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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10141579
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Filing Dt:
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05/09/2002
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Title:
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RANDOM SLIP GENERATOR
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Patent #:
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Issue Dt:
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12/18/2007
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10141926
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Filing Dt:
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05/10/2002
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Title:
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RANDOM CACHE LINE REFILL
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Patent #:
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Issue Dt:
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04/19/2005
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10159818
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Filing Dt:
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05/31/2002
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Title:
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APPARATUS AND METHOD FOR RELATIVE POSITION ANNOTATION OF STANDARD CELL COMPONENTS TO FACILITATE DATAPATH DESIGN
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Patent #:
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Issue Dt:
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03/21/2006
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10186290
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Filing Dt:
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06/27/2002
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Title:
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MECHANISM FOR PROXY MANAGEMENT OF MULTIPROCESSOR VIRTUAL MEMORY
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10186330
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Filing Dt:
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06/27/2002
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Title:
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MECHANISM FOR PROXY MANAGEMENT OF MULTIPROCESSOR STORAGE HIERARCHIES
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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10193682
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Filing Dt:
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07/12/2002
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Title:
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INTERFACE WITH CREDIT-BASED FLOW CONTROL AND SUSTAINED BUS SIGNALS
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10195522
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Filing Dt:
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07/16/2002
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Publication #:
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Pub Dt:
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11/28/2002
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Title:
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EXTENDED PRECISION ACCUMULATOR
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Patent #:
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Issue Dt:
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07/17/2007
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10255107
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Filing Dt:
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09/26/2002
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Title:
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FULL SCAN SOLUTION FOR LATCHED-BASED DESIGN
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10274424
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Filing Dt:
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10/18/2002
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Title:
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APPARATUS AND METHOD FOR GENERATING MULTI-PHASE SIGNALS WITH DIGITALLY CONTROLLED TRIM CAPACITORS
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10278537
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Filing Dt:
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10/22/2002
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Title:
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APPARATUS AND METHOD FOR DISCOVERING A SCRATCH PAD MEMORY CONFIGURATION
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Patent #:
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01/02/2007
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10448324
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05/28/2003
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Title:
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SYSTEM AND METHOD TO TRACE HIGH PERFORMANCE MULTI-ISSUE PROCESSORS
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03/20/2007
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10449818
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05/30/2003
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Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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02/13/2007
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10449825
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05/30/2003
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Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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Patent #:
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12/08/2015
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10637005
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08/08/2003
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Title:
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Virtual machine coprocessor for accelerating software execution
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06/29/2010
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10637006
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08/08/2003
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Title:
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VIRTUAL MACHINE COPROCESSOR FACILITATING DYNAMIC COMPILATION
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04/27/2010
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10698061
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10/31/2003
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08/11/2005
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Title:
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MULTI-ISA INSTRUCTION FETCH UNIT FOR A PROCESSOR, AND APPLICATIONS THEREOF
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07/27/2010
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10921077
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08/18/2004
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04/14/2005
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Title:
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INTERSTREAM CONTROL AND COMMUNICATIONS FOR MULTI-STREAMING DIGITAL PROCESSORS
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02/08/2011
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10923584
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08/20/2004
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02/17/2005
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Title:
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01/01/2008
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10956490
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10/01/2004
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05/11/2006
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Title:
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MICROPROCESSOR INSTRUCTIONS FOR EFFICIENT BIT STREAM EXTRACTIONS
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01/18/2011
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10956498
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10/01/2004
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04/06/2006
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Title:
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MICROPROCESSOR INSTRUCTION USING ADDRESS INDEX VALUES TO ENABLE ACCESS OF A VIRTUAL BUFFER IN CIRCULAR FASHION
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10/09/2007
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10994827
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11/23/2004
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04/14/2005
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03/24/2009
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12/03/2004
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05/12/2005
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APPARATUS AND METHOD FOR DISCOVERING A SCRATCH PAD MEMORY CONFIGURATION
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01/06/2009
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11026324
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12/29/2004
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07/06/2010
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11051980
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02/04/2005
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08/10/2006
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02/16/2010
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11051998
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02/04/2005
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08/10/2006
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Title:
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PRIORITIZING THREAD SELECTION PARTLY BASED ON STALL LIKELIHOOD PROVIDING STATUS INFORMATION OF INSTRUCTION OPERAND REGISTER USAGE AT PIPELINE STAGES
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03/17/2009
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11086258
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03/22/2005
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08/10/2006
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Title:
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RETURN DATA SELECTOR EMPLOYING BARREL-INCREMENTER-BASED ROUND-ROBIN APPARATUS
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02/10/2009
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11087063
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03/22/2005
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08/10/2006
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Title:
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FETCH DIRECTOR EMPLOYING BARREL-INCREMENTER-BASED ROUND-ROBIN APPARATUS FOR USE IN MULTITHREADING MICROPROCESSOR
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12/08/2009
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11087064
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03/22/2005
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08/10/2006
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Title:
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BARREL-INCREMENTER-BASED ROUND-ROBIN APPARATUS AND INSTRUCTION DISPATCH SCHEDULER EMPLOYING SAME FOR USE IN MULTITHREADING MICROPROCESSOR
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02/02/2010
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11087070
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03/22/2005
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Pub Dt:
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09/14/2006
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Title:
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INSTRUCTION DISPATCH SCHEDULER EMPLOYING ROUND-ROBIN APPARATUS SUPPORTING MULTIPLE THREAD PRIORITIES FOR USE IN MULTITHREADING MICROPROCESSOR
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10/06/2009
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11107489
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Filing Dt:
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04/14/2005
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Publication #:
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Pub Dt:
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10/19/2006
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Title:
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APPARATUS AND METHOD FOR SOFTWARE SPECIFIED POWER MANAGEMENT PERFORMANCE USING LOW POWER VIRTUAL THREADS
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12/01/2009
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11107492
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04/14/2005
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Pub Dt:
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10/19/2006
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Title:
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APPARATUS AND METHOD FOR AUTOMATIC LOW POWER MODE INVOCATION IN A MULTI-THREADED PROCESSOR
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07/31/2012
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11121945
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05/05/2005
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11/09/2006
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Title:
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PROCESSOR CORE AND MULTIPLIER THAT SUPPORT BOTH VECTOR AND SINGLE VALUE MULTIPLICATION
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07/24/2012
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11122004
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05/05/2005
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11/09/2006
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Title:
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PROCESSOR CORE AND MULTIPLIER THAT SUPPORT A MULTIPLY AND DIFFERENCE OPERATION BY INVERTING SIGN BITS IN BOOTH RECODING
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03/16/2010
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11191258
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07/27/2005
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08/10/2006
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MULTITHREADING INSTRUCTION SCHEDULER EMPLOYING THREAD GROUP PRIORITIES
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12/15/2009
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11214466
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08/29/2005
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02/16/2006
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METHOD AND APPARATUS FOR REDIRECTION OF OPERATIONS BETWEEN INTERFACES
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11/17/2009
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11257381
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10/24/2005
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03/09/2006
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METHOD AND APPARATUS FOR MASKING A MICROPROCESSOR EXECUTION SIGNATURE
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05/04/2010
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11261654
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10/31/2005
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05/03/2007
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PROCESSOR CORE AND METHOD FOR MANAGING BRANCH MISPREDICTION IN AN OUT-OF-ORDER PROCESSOR PIPELINE
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06/08/2010
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11261655
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10/31/2005
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05/03/2007
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PROCESSOR CORE AND METHOD FOR MANAGING PROGRAM COUNTER REDIRECTION IN AN OUT-OF-ORDER PROCESSOR PIPELINE
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01/18/2011
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11272718
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11/15/2005
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05/17/2007
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Title:
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PROCESSOR UTILIZING A LOOP BUFFER TO REDUCE POWER CONSUMPTION
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07/14/2009
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11272719
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11/15/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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MICROPROCESSOR HAVING A POWER-SAVING INSTRUCTION CACHE WAY PREDICTOR AND INSTRUCTION REPLACEMENT SCHEME
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Patent #:
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02/24/2009
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Application #:
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11272737
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Filing Dt:
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11/15/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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PROCESSOR ACCESSING A SCRATCH PAD ON-DEMAND TO REDUCE POWER CONSUMPTION
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12/16/2008
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11277101
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03/21/2006
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Publication #:
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03/15/2007
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Title:
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INTERRUPT AND EXCEPTION HANDLING FOR MULTI-STREAMING DIGITAL PROCESSORS
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Patent #:
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Issue Dt:
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05/11/2010
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11277293
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03/23/2006
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07/20/2006
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Title:
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QUEUEING SYSTEM FOR PROCESSORS IN PACKET ROUTING OPERATIONS
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Issue Dt:
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02/09/2010
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11278747
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04/05/2006
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Pub Dt:
|
10/05/2006
| | | | |
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Title:
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METHODS AND APPARATUS FOR MANAGING A BUFFER OF EVENTS IN THE BACKGROUND
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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11278874
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Filing Dt:
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04/06/2006
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|
Publication #:
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Pub Dt:
|
06/21/2007
| | | | |
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Title:
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METHODS AND APPARATUS FOR IMPROVING FETCHING AND DISPATCH OF INSTRUCTIONS IN MULTITHREADED PROCESSORS
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11278890
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Filing Dt:
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04/06/2006
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Publication #:
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Pub Dt:
|
09/28/2006
| | | | |
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Title:
|
METHOD AND APPARATUS FOR NON-SPECULATIVE PRE-FETCH OPERATION IN DATA PACKET PROCESSING
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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11278901
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Filing Dt:
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04/06/2006
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Publication #:
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Pub Dt:
|
09/28/2006
| | | | |
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Title:
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METHOD FOR ALLOCATING MEMORY SPACE FOR LIMITED PACKET HEAD AND/OR TAIL GROWTH
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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11279136
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Filing Dt:
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04/10/2006
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Publication #:
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Pub Dt:
|
11/02/2006
| | | | |
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Title:
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SYSTEM AND METHOD FOR EXTRACTING FIELDS FROM PACKETS HAVING FIELDS SPREAD OVER MORE THAN ONE REGISTER
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Patent #:
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Issue Dt:
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05/15/2012
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Application #:
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11279914
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Filing Dt:
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04/17/2006
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Publication #:
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Pub Dt:
|
11/09/2006
| | | | |
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Title:
|
METHOD AND APPARATUS FOR BINDING SHADOW REGISTERS TO VECTORED INTERRUPTS
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11336923
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Filing Dt:
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01/23/2006
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Publication #:
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Pub Dt:
|
07/26/2007
| | | | |
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Title:
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CONDITIONAL BRANCH EXECUTION IN A PROCESSOR HAVING A DATA MOVER ENGINE THAT ASSOCIATES REGISTER ADDRESSES WITH MEMORY ADDRESSES
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11336937
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Filing Dt:
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01/23/2006
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Publication #:
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Pub Dt:
|
07/26/2007
| | | | |
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Title:
|
CONDITIONAL BRANCH EXECUTION IN A PROCESSOR HAVING A READ-TIE INSTRUCTION AND A DATA MOVER ENGINE THAT ASSOCIATES REGISTER ADDRESSES WITH MEMORY ADDRESSES
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Patent #:
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Issue Dt:
|
05/18/2010
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Application #:
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11336938
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Filing Dt:
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01/23/2006
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|
Publication #:
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Pub Dt:
|
07/26/2007
| | | | |
|
Title:
|
CONDITIONAL BRANCH EXECUTION IN A PROCESSOR HAVING A WRITE-TIE INSTRUCTION AND A DATA MOVER ENGINE THAT ASSOCIATES REGISTER ADDRESSES WITH MEMORY ADDRESSES
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Patent #:
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Issue Dt:
|
06/09/2009
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Application #:
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11337440
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Filing Dt:
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01/24/2006
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Publication #:
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Pub Dt:
|
06/15/2006
| | | | |
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Title:
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PROVIDING EXTENDED PRECISION IN SIMD VECTOR ARITHMETIC OPERATIONS
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Patent #:
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Issue Dt:
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06/23/2009
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Application #:
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11360338
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Filing Dt:
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02/23/2006
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Publication #:
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Pub Dt:
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07/13/2006
| | | | |
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Title:
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QUEUEING SYSTEM FOR PROCESSORS IN PACKET ROUTING OPERATIONS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11362763
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Filing Dt:
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02/28/2006
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Publication #:
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Pub Dt:
|
08/30/2007
| | | | |
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Title:
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Compact linked-list-based multi-threaded instruction graduation buffer
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11362764
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Filing Dt:
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02/28/2006
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Publication #:
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Pub Dt:
|
08/30/2007
| | | | |
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Title:
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SYSTEM AND METHOD FOR PROPAGATING OPERAND AVAILABILITY PREDICTION BITS WITH INSTRUCTIONS THROUGH A PIPELINE IN AN OUT-OF-ORDER PROCESSOR
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Patent #:
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Issue Dt:
|
06/10/2008
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Application #:
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11365280
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Filing Dt:
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02/28/2006
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Publication #:
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Pub Dt:
|
07/06/2006
| | | | |
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Title:
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PREFETCHING HINTS
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Patent #:
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Issue Dt:
|
01/05/2010
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Application #:
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11380924
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Filing Dt:
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04/29/2006
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Publication #:
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Pub Dt:
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07/19/2007
| | | | |
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Title:
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FUNCTIONAL VALIDATION OF A PACKET MANAGEMENT UNIT
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Patent #:
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Issue Dt:
|
03/20/2007
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Application #:
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11380925
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Filing Dt:
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04/29/2006
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Publication #:
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Pub Dt:
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11/16/2006
| | | | |
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Title:
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CONFIGURABLE CO-PROCESSOR INTERFACE
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11391716
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Filing Dt:
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03/28/2006
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Publication #:
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Pub Dt:
|
10/04/2007
| | | | |
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Title:
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MULTITHREADED DYNAMIC VOLTAGE-FREQUENCY SCALING MICROPROCESSOR
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Patent #:
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Issue Dt:
|
12/28/2010
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Application #:
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11410146
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Filing Dt:
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04/25/2006
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
|
Title:
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EXTENDED PRECISION ACCUMULATOR
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Patent #:
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Issue Dt:
|
12/01/2009
|
Application #:
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11442695
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Filing Dt:
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05/25/2006
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Publication #:
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Pub Dt:
|
12/13/2007
| | | | |
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Title:
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APPARATUS AND METHOD FOR DISCRETE TEST ACCESS CONTROL OF MULTIPLE CORES
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Patent #:
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Issue Dt:
|
03/27/2012
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Application #:
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11442696
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Filing Dt:
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05/25/2006
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Title:
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APPARATUS AND METHOD FOR PROCESSING TEMPLATE BASED USER DEFINED INSTRUCTIONS
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11445518
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Filing Dt:
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06/02/2006
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|
Publication #:
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Pub Dt:
|
10/05/2006
| | | | |
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Title:
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DYNAMIC SELECTION OF A COMPRESSION ALGORITHM FOR TRACE DATA
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Patent #:
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Issue Dt:
|
03/31/2009
|
Application #:
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11463939
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Filing Dt:
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08/11/2006
|
|
Publication #:
|
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Pub Dt:
|
02/22/2007
| | | | |
|
Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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Patent #:
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Issue Dt:
|
02/16/2010
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Application #:
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11463950
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Filing Dt:
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08/11/2006
|
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Publication #:
|
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Pub Dt:
|
02/22/2007
| | | | |
|
Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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Patent #:
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|
Issue Dt:
|
05/12/2009
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Application #:
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11463954
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Filing Dt:
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08/11/2006
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Publication #:
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Pub Dt:
|
02/22/2007
| | | | |
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Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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Patent #:
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Issue Dt:
|
01/20/2009
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Application #:
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11463957
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Filing Dt:
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08/11/2006
|
|
Publication #:
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Pub Dt:
|
03/08/2007
| | | | |
|
Title:
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MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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Patent #:
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Issue Dt:
|
05/06/2008
|
Application #:
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11485959
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Filing Dt:
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07/14/2006
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|
Publication #:
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Pub Dt:
|
05/29/2008
| | | | |
|
Title:
|
METHOD FOR LATEST PRODUCER TRACKING IN AN OUT-OF-ORDER PROCESSOR, AND APPLICATIONS THEREOF
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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11485960
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Filing Dt:
|
07/14/2006
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|
Publication #:
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|
Pub Dt:
|
01/17/2008
| | | | |
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Title:
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Latest producer tracking in an out-of-order processor, and applications thereof
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|
Patent #:
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Issue Dt:
|
01/19/2010
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Application #:
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11505865
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
|
02/21/2008
| | | | |
|
Title:
|
MICRO TAG ARRAY HAVING WAY SELECTION BITS FOR REDUCING DATA CACHE ACCESS POWER
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Patent #:
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Issue Dt:
|
02/02/2010
|
Application #:
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11505869
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
|
02/21/2008
| | | | |
|
Title:
|
METHODS FOR REDUCING DATA CACHE ACCESS POWER IN A PROCESSOR USING WAY SELECTION BITS
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Patent #:
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Issue Dt:
|
01/12/2010
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Application #:
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11515720
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Filing Dt:
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09/06/2006
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|
Publication #:
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Pub Dt:
|
03/06/2008
| | | | |
|
Title:
|
SYSTEM FOR SYNCHRONIZING AN IN-ORDER CO-PROCESSOR WITH AN OUT-OF-ORDER PROCESSOR USING A CO-PROCESSOR INTERFACE STORE DATA QUEUE
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Patent #:
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|
Issue Dt:
|
10/04/2011
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Application #:
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11515723
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Filing Dt:
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09/06/2006
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Publication #:
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Pub Dt:
|
03/06/2008
| | | | |
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Title:
|
COPROCESSOR LOAD DATA QUEUE FOR INTERFACING AN OUT-OF-ORDER EXECUTION UNIT WITH AN IN-ORDER COPROCESSOR
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Patent #:
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Issue Dt:
|
04/03/2012
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Application #:
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11517569
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Filing Dt:
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09/08/2006
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|
Publication #:
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Pub Dt:
|
03/13/2008
| | | | |
|
Title:
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SOFTWARE PROGRAMMABLE HARDWARE STATE MACHINES
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11529710
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Filing Dt:
|
09/29/2006
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|
Publication #:
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|
Pub Dt:
|
04/03/2008
| | | | |
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Title:
|
Detection and prevention of write-after-write hazards, and applications thereof
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|
Patent #:
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Issue Dt:
|
04/17/2018
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Application #:
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11529728
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Filing Dt:
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09/29/2006
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Publication #:
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Pub Dt:
|
04/03/2008
| | | | |
|
Title:
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LOAD/STORE UNIT FOR A PROCESSOR, AND APPLICATIONS THEREOF
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
11530945
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Filing Dt:
|
09/12/2006
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Publication #:
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Pub Dt:
|
03/29/2007
| | | | |
|
Title:
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EXTENDED INSTRUCTION SET FOR PACKET PROCESSING APPLICATIONS
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|
Patent #:
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|
Issue Dt:
|
07/20/2010
|
Application #:
|
11532520
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Filing Dt:
|
09/16/2006
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|
Publication #:
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|
Pub Dt:
|
03/20/2008
| | | | |
|
Title:
|
TRANSACTION SELECTOR EMPLOYING BARREL-INCREMENTER-BASED ROUND-ROBIN APPARATUS SUPPORTING DYNAMIC PRIORITIES IN MULTI-PORT SWITCH
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|
Patent #:
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|
Issue Dt:
|
08/10/2010
|
Application #:
|
11532521
|
Filing Dt:
|
09/16/2006
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|
Publication #:
|
|
Pub Dt:
|
03/20/2008
| | | | |
|
Title:
|
TRANSACTION SELECTOR EMPLOYING ROUND-ROBIN APPARATUS SUPPORTING DYNAMIC PRIORITIES IN MULTI-PORT SWITCH
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|
Patent #:
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Issue Dt:
|
06/14/2011
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Application #:
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11532522
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Filing Dt:
|
09/16/2006
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|
Publication #:
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|
Pub Dt:
|
03/20/2008
| | | | |
|
Title:
|
BIFURCATED TRANSACTION SELECTOR SUPPORTING DYNAMIC PRIORITIES IN MULTI-PORT SWITCH
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|
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|
Patent #:
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|
Issue Dt:
|
08/02/2011
|
Application #:
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11532523
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Filing Dt:
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09/16/2006
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|
Publication #:
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Pub Dt:
|
03/20/2008
| | | | |
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Title:
|
TRANSACTION SELECTOR EMPLOYING TRANSACTION QUEUE GROUP PRIORITIES IN MULTI-PORT SWITCH
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Patent #:
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|
Issue Dt:
|
04/20/2010
|
Application #:
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11537584
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Filing Dt:
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09/29/2006
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Publication #:
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Pub Dt:
|
04/03/2008
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR TRACING PROCESSOR STATE FROM MULTIPLE CLOCK DOMAINS
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|
Patent #:
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|
Issue Dt:
|
07/29/2008
|
Application #:
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11539322
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Filing Dt:
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10/06/2006
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Publication #:
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Pub Dt:
|
11/08/2007
| | | | |
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Title:
|
FETCH AND DISPATCH DISASSOCIATION APPARATUS FOR MULTI-STREAMING PROCESSORS
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|
Patent #:
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|
Issue Dt:
|
09/22/2009
|
Application #:
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11545706
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Filing Dt:
|
10/11/2006
|
|
Publication #:
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|
Pub Dt:
|
04/03/2008
| | | | |
|
Title:
|
DATA CACHE VIRTUAL HINT WAY PREDICTION, AND APPLICATIONS THEREOF
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|
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|
Patent #:
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|
Issue Dt:
|
03/17/2009
|
Application #:
|
11549413
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Filing Dt:
|
10/13/2006
|
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
|
Title:
|
MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11549418
|
Filing Dt:
|
10/13/2006
|
|
Publication #:
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|
Pub Dt:
|
05/03/2007
| | | | |
|
Title:
|
MICROPROCESSOR WITH IMPROVED DATA STREAM PREFETCHING
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|
|
|
Patent #:
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|
Issue Dt:
|
05/05/2009
|
Application #:
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11552640
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Filing Dt:
|
10/25/2006
|
|
Publication #:
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|
Pub Dt:
|
05/10/2007
| | | | |
|
Title:
|
CONTEXT SWITCHING PROCESSOR WITH MULTIPLE CONTEXT CONTROL REGISTER SETS INCLUDING WRITE ADDRESS REGISTER IDENTIFYING DESTINATION REGISTER FOR WAITING CONTEXT TO STORE RETURNED DATA FROM EXTERNAL SOURCE
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|
