Total properties:
50
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09074317
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Filing Dt:
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05/08/1998
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Title:
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INFORMATION PROCESSING DEVICE
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09160046
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Filing Dt:
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09/25/1998
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Publication #:
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Pub Dt:
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09/06/2001
| | | | |
Title:
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FLASH MEMORY DEVICE AND A FABRICATION PROCESS THEREOF
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09244429
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Filing Dt:
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02/04/1999
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Title:
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SEMICONDUCTOR DEVICES WITH REDUCED CONTROL GATE DIMENSIONS
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09366369
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Filing Dt:
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08/03/1999
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Title:
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DEVICE MODELING AND CHARACTERIZATION STRUCTURE WITH MULTIPLEXED PADS
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09413621
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Filing Dt:
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10/06/1999
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Title:
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IN-SITU PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE WITH INTEGRAL REMOVAL OF ANTIREFLECTION AND ETCH STOP LAYERS
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09426757
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Filing Dt:
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10/26/1999
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Title:
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MICROPROCESSOR FOR CONTROLLING BUSSES
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09476906
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Filing Dt:
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01/03/2000
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Title:
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DEPOSITED SCREEN OXIDE FOR REDUCING GATE EDGE LIFTING
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Patent #:
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Issue Dt:
|
01/21/2003
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Application #:
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09491457
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Filing Dt:
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01/26/2000
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Title:
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NOVEL NITRIDATION BARRIERS FOR NITRIDATED TUNNEL OXIDE FOR CIRCUITRY FOR FLASH TECHNOLOGY AND FOR LOCOS/STI ISOLATION
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09538523
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Filing Dt:
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03/30/2000
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Publication #:
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Pub Dt:
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04/25/2002
| | | | |
Title:
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CLOCK CONTROL CIRCUIT
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09543484
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Filing Dt:
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04/06/2000
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Title:
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USE OF GASEOUS SILICON HYDRIDES AS A REDUCING AGENT TO REMOVE RE-SPUTTERED SILICON OXIDE
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09548616
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Filing Dt:
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04/13/2000
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Title:
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METHOD OF HIGH DENSITY PLASMA METAL ETCHING
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09594207
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Filing Dt:
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06/14/2000
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Title:
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FLASH MEMORY HAVING PRE-INTERPOLY DIELECTRIC TREATMENT LAYER AND METHOD OF FORMING
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09665916
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Filing Dt:
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09/20/2000
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Title:
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NAND ARRAY STRUCTURE AND METHOD WITH BURIED LAYER
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09667686
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Filing Dt:
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09/22/2000
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Title:
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MULTIPLE CHANNEL IMPLANTATION TO FORM RETROGRADE CHANNEL PROFILE AND TO ENGINEER THRESHOLD VOLTAGE AND SUB-SURFACE PUNCH-THROUGH
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09684694
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Filing Dt:
|
10/04/2000
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Title:
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USING A LOW DRAIN BIAS DURING ERASE VERIFY TO ENSURE COMPLETE REMOVAL OF RESIDUAL CHARGE IN THE NITRIDE IN SONOS NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09688504
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Filing Dt:
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10/16/2000
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Title:
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PROCESS FOR FABRICATING A NON-VOLATILE MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
|
03/25/2003
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Application #:
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09691643
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Filing Dt:
|
10/18/2000
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Title:
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METHOD OF FORMING NARROW INSULATING SPACERS FOR USE IN REDUCING MINIMUM COMPONENT SIZE
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|
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Patent #:
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Issue Dt:
|
02/04/2003
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Application #:
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09698485
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Filing Dt:
|
10/30/2000
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Title:
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THIN OXIDE ANTI-FUSE
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|
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Patent #:
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Issue Dt:
|
01/14/2003
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Application #:
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09698614
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Filing Dt:
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10/27/2000
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Title:
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MEMORY LINE DISCHARGE BEFORE SENSING
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Patent #:
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|
Issue Dt:
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12/31/2002
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Application #:
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09699531
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Filing Dt:
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10/30/2000
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Title:
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METHOD FOR SELECTIVE REMOVAL OF ONO LAYER
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|
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09699972
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Filing Dt:
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10/30/2000
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Title:
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SOURCE SIDE BORON IMPLANTING AND DIFFUSING DEVICE ARCHITECTURE FOR DEEP SUB 0.18 MICRON FLASH MEMORY
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Patent #:
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|
Issue Dt:
|
03/25/2003
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Application #:
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09721031
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Filing Dt:
|
11/22/2000
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Title:
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STAGGERED BITLINE STRAPPING OF A NON-VOLATILE MEMORY CELL
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|
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Patent #:
|
|
Issue Dt:
|
03/25/2003
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Application #:
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09794482
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Filing Dt:
|
02/26/2001
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Title:
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STAIRCASE PROGRAM VERIFY FOR MULTI-LEVEL CELL FLASH MEMORY DESIGNS
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|
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Patent #:
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Issue Dt:
|
03/04/2003
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Application #:
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09798667
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Filing Dt:
|
03/02/2001
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Publication #:
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Pub Dt:
|
09/19/2002
| | | | |
Title:
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PROCESS FOR FABRICATING A NON-VOLATILE MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
|
03/18/2003
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Application #:
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09803400
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Filing Dt:
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03/12/2001
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Publication #:
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Pub Dt:
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09/12/2002
| | | | |
Title:
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HIGH VOLTAGE OXIDATION METHOD FOR HIGHLY RELIABLE FLASH MEMORY DEVICES
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|
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09809208
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Filing Dt:
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03/16/2001
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Publication #:
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Pub Dt:
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12/20/2001
| | | | |
Title:
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FRACTIONAL-N-PILL FREQUENCY SYNTHESIZER AND PHASE ERROR CANCELING METHOD THEREFOR
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|
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Patent #:
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|
Issue Dt:
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02/11/2003
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Application #:
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09809221
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Filing Dt:
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03/16/2001
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Publication #:
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Pub Dt:
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01/24/2002
| | | | |
Title:
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PLL FREQUENCY SYNTHESIZER CIRCUIT
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|
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Patent #:
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|
Issue Dt:
|
02/04/2003
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Application #:
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09844692
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Filing Dt:
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04/27/2001
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Publication #:
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|
Pub Dt:
|
10/31/2002
| | | | |
Title:
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METHOD AND SYSTEM FOR REDUCING THINNING OF FIELD ISOLATION STRUCTURES IN A FLASH MEMORY DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
01/21/2003
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Application #:
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09850484
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Filing Dt:
|
05/07/2001
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Title:
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METHOD FOR FORMING SELF-ALIGNED CONTACTS USING CONSUMABLE SPACERS
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|
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Patent #:
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|
Issue Dt:
|
02/11/2003
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Application #:
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09854351
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Filing Dt:
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05/10/2001
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Publication #:
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Pub Dt:
|
02/28/2002
| | | | |
Title:
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SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
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|
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Patent #:
|
|
Issue Dt:
|
01/21/2003
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Application #:
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09861031
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Filing Dt:
|
05/18/2001
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Title:
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METHOD OF CHANNEL HOT ELECTRON PROGRAMMING FOR SHORT CHANNEL NOR FLASH ARRAYS
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Patent #:
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|
Issue Dt:
|
02/04/2003
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Application #:
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09873643
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Filing Dt:
|
06/04/2001
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Title:
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METHOD AND APPARATUS FOR BOOSTING BITLINES FOR LOW VCC READ
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|
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Patent #:
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|
Issue Dt:
|
01/21/2003
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Application #:
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09875073
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Filing Dt:
|
06/05/2001
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Title:
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METHOD AND SYSTEM FOR QUALIFYING AN ONO LAYER IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
01/28/2003
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Application #:
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09886861
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Filing Dt:
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06/21/2001
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Title:
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ERASE METHOD FOR DUAL BIT VIRTUAL GROUND FLASH
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|
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Patent #:
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|
Issue Dt:
|
02/25/2003
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Application #:
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09892685
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Filing Dt:
|
06/27/2001
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Title:
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HIGH DENSITY FLASH EEPROM ARRAY WITH SOURCE SIDE INJECTION
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|
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Patent #:
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|
Issue Dt:
|
02/11/2003
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Application #:
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09902332
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Filing Dt:
|
07/10/2001
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Title:
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USING HOT CARRIER INJECTION TO CONTROL OVER-PROGRAMMING IN A NON-VOLATILE MEMORY CELL HAVING AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
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|
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Patent #:
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|
Issue Dt:
|
03/18/2003
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Application #:
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09905421
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Filing Dt:
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07/13/2001
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Publication #:
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Pub Dt:
|
11/08/2001
| | | | |
Title:
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MIXED MODE MULTI LEVEL MODE INDICTOR
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Patent #:
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|
Issue Dt:
|
03/18/2003
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Application #:
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09915018
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Filing Dt:
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07/25/2001
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Publication #:
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Pub Dt:
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01/30/2003
| | | | |
Title:
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VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES
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|
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Patent #:
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Issue Dt:
|
02/25/2003
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Application #:
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09917178
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Filing Dt:
|
07/30/2001
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Title:
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NOR ARRAY WITH BURIED TRENCH SOURCE LINE
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|
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Patent #:
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|
Issue Dt:
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04/01/2003
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Application #:
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09917182
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Filing Dt:
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07/30/2001
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Publication #:
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Pub Dt:
|
01/30/2003
| | | | |
Title:
|
LOW DEFECT DENSITY PROCESS FOR DEEP SUB-0.18UM FLASH MEMORY TECHNOLOGIES
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Patent #:
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|
Issue Dt:
|
02/25/2003
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Application #:
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09928059
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Filing Dt:
|
08/10/2001
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Title:
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DECODER APPARATUS AND METHODS FOR PRE-CHARGING BIT LINES
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|
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Patent #:
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|
Issue Dt:
|
01/21/2003
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Application #:
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09969573
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Filing Dt:
|
10/01/2001
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Title:
|
FORMATION OF STI (SHALLOW TRENCH ISOLATION) STRUCTURES WITHIN CORE AND PERIPHERY AREAS OF FLASH MEMORY DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
01/21/2003
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Application #:
|
09999869
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Filing Dt:
|
10/23/2001
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Title:
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DRAIN SIDE SENSING SCHEME FOR VIRTUAL GROUND FLASH EPROM ARRAY WITH ADJACENT BIT CHARGE AND HOLD
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|
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Patent #:
|
|
Issue Dt:
|
02/25/2003
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Application #:
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10010985
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Filing Dt:
|
12/05/2001
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Title:
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METHOD AND APPARATUS FOR ADJUSTING ON-CHIP CURRENT REFERENCE FOR EEPROM SENSING
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Patent #:
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|
Issue Dt:
|
02/04/2003
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Application #:
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10044510
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Filing Dt:
|
01/11/2002
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Title:
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METHOD OF MANUFACTURING HIGH VOLTAGE TRANSISTOR WITH MODIFIED FIELD IMPLANT MASK
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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10050254
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Filing Dt:
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01/16/2002
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Title:
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NEGATIVE PUMP REGULATOR USING MOS CAPACITOR
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Patent #:
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Issue Dt:
|
03/04/2003
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Application #:
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10050257
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Filing Dt:
|
01/16/2002
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Title:
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SOURCE SIDE SENSING SCHEME FOR VIRTUAL GROUND READ OF FLASH EPROM ARRAY WITH ADJACENT BIT PRECHARGE
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|
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Patent #:
|
|
Issue Dt:
|
03/11/2003
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Application #:
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10050650
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Filing Dt:
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01/16/2002
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Title:
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METHOD AND APPARATUS FOR SOFT PROGRAM VERIFICATION IN A MEMORY DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
01/21/2003
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Application #:
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10103721
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Filing Dt:
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03/25/2002
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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10187944
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Filing Dt:
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07/03/2002
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Publication #:
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Pub Dt:
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12/05/2002
| | | | |
Title:
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SERVO CONTROLLER AND SERVO CONTROL METHOD
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|