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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10245626
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Filing Dt:
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09/17/2002
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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METHOD FOR TESTING INTEGRATED SEMICONDUCTOR MEMORY DEVICES
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10245629
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Filing Dt:
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09/17/2002
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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INTEGRATED CIRCUIT AND METHOD FOR OPERATING THE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10247572
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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METHOD FOR OPERATING A SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10247574
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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WAFER WITH ADDITIONAL CIRCUIT PARTS IN THE KERF AREA FOR TESTING INTEGRATED CIRCUITS ON THE WAFER
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10247575
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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METHOD FOR REWIRING PADS IN A WAFER-LEVEL PACKAGE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10247576
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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METHOD OF INSULATING INTERCONNECTS, AND MEMORY CELL ARRAY WITH INSULATED INTERCONNECTS
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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10247577
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Filing Dt:
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09/19/2002
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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CIRCUIT CONFIGURATION FOR RECEIVING A DATA SIGNAL
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10252995
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Filing Dt:
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09/23/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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DIGITAL MAGNETIC MEMORY CELL DEVICE
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10253001
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Filing Dt:
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09/23/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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ELECTRONIC CIRCUIT WITH A DRIVER CIRCUIT
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10253196
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Filing Dt:
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09/24/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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METHOD OF ETCHING A LAYER IN A TRENCH AND METHOD OF FABRICATING A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10253465
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Filing Dt:
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09/24/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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METHOD FOR REPLACING DEFECTIVE MEMORY CELLS IN DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10253793
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Filing Dt:
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09/24/2002
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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APPARATUS FOR SIGNALING THAT A PREDETERMINED TIME VALUE HAS ELAPSED
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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10254470
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Filing Dt:
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09/25/2002
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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FLUORESCENT NAPHTHALENE -1,4,5,8-TETRACARBOXYLIC BISIMIDES WITH AN ELECTRON-DONATING SUBSTITUENT ON THE NUCLEUS
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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10254692
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Filing Dt:
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09/25/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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TRENCH CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10254693
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Filing Dt:
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09/25/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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10254694
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Filing Dt:
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09/25/2002
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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METHOD FOR INTEGRATING IMPERFECT SEMICONDUCTOR MEMORY DEVICES IN DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10260899
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10261034
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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09/18/2003
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Title:
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POLY-O-HYDROXYAMIDES, POLYBENZOXAZOLES, PROCESSES FOR PRODUCING POLY-O-HYDROXYAMIDES, PROCESSES FOR PRODUCING POLYBENZOXAZOLES, DIELECTRICS INCLUDING A POLYBENZOXAZOLE, ELECTRONIC COMPONENTS INCLUDING THE DIELECTRICS, AND PROCESSES FOR MANUFACTURING THE ELECTRONIC
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10261194
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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DATA PROCESSING SYSTEM FOR DESIGNING A LAYOUT OF AN INTEGRATED ELECTRONIC CIRCUIT HAVING A MULTIPLICITY OF ELECTRONIC COMPONENTS AND METHOD OF DESIGNING A LAYOUT
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10261200
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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SCALABLE DRIVER DEVICE AND RELATED INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10261849
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE, AND USE OF THE METHOD
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10262117
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Filing Dt:
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10/01/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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METHOD OF FABRICATING A MICROSTRUCTURE AND PHOTOLITHOGRAPHY TRIMMING MASK
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10262172
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Filing Dt:
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10/01/2002
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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INTEGRATED MEMORY DEVICE, METHOD OF OPERATING AN INTEGRATED MEMORY, AND MEMORY SYSTEM HAVING A PLURALITY OF INTEGRATED MEMORIES
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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10262179
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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METHOD OF PRODUCING BIOCOMPATIBLE STRUCTURES AND BIOCOMPATIBLE MICROCHIP
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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10266187
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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APPARATUS FOR GENERATING MEMORY-INTERNAL COMMAND SIGNALS FROM A MEMORY OPERATION COMMAND
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10266188
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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STORAGE CELL FIELD AND METHOD OF PRODUCING THE SAME
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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10266190
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
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Title:
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DIGITAL MEMORY CIRCUIT HAVING A PLURALITY OF SEGMENTED MEMORY AREAS
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10266295
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Filing Dt:
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10/08/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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INTEGRABLE, CONTROLLABLE DELAY DEVICE, DELAY DEVICE IN A CONTROL LOOP, AND METHOD FOR DELAYING A CLOCK SIGNAL USING A DELAY DEVICE
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Patent #:
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Issue Dt:
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11/25/2008
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Application #:
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10266296
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Filing Dt:
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10/08/2002
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Publication #:
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Pub Dt:
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05/22/2003
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Title:
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DELAY LOCKED LOOP
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10266322
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Filing Dt:
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10/08/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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SEMICONDUCTOR MODULE HAVING A CONFIGURABLE DATA WIDTH OF AN OUTPUT BUS, AND A HOUSING CONFIGURATION HAVING A SEMICONDUCTOR MODULE
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10266353
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
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Title:
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MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10266354
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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CIRCUIT CONFIGURATION FOR PROCESSING DATA, AND METHOD FOR IDENTIFYING AN OPERATING STATE
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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10266355
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Filing Dt:
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10/07/2002
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
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Title:
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DIGITAL MEMORY CIRCUIT HAVING A PLURALITY OF MEMORY AREAS
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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10267224
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Filing Dt:
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10/09/2002
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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METHOD FOR FABRICATING A MICROCONTACT SPRING ON A SUBSTRATE
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10267335
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Filing Dt:
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10/09/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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PROCESS FOR ETCHING A METAL LAYER SYSTEM
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10268148
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Filing Dt:
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10/10/2002
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Publication #:
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Pub Dt:
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10/09/2003
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Title:
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DEFECT-MINIMIZING, TOPOLOGY-INDEPENDENT PLANARIZATION OF PROCESS SURFACES IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10268203
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Filing Dt:
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10/10/2002
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Publication #:
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Pub Dt:
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04/10/2003
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Title:
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TEST WAFER AND METHOD FOR PRODUCING THE TEST WAFER
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10269834
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Filing Dt:
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10/11/2002
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Publication #:
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Pub Dt:
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05/08/2003
| | | | |
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Title:
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SEMICONDUCTOR MEMORY APPARATUS
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10272344
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Filing Dt:
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10/15/2002
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Publication #:
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Pub Dt:
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04/17/2003
| | | | |
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Title:
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METHOD FOR TESTING SEMICONDUCTOR CIRCUIT DEVICES
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Patent #:
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Issue Dt:
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12/09/2003
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Application #:
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10272386
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Filing Dt:
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10/15/2002
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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METHOD OF FORMING A VERTICAL FIELD-EFFECT TRANSISTOR DEVICE
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10272848
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Filing Dt:
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10/17/2002
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Publication #:
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Pub Dt:
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04/17/2003
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Title:
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METHOD FOR DETERMINING STATISTICAL FLUCTUATIONS OF VALUES OF GEOMETRICAL PROPERTIES OF STRUCTURES REQUIRED FOR THE FABRICATION OF SEMICONDUCTOR COMPONENTS
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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10273520
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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METHOD AND COMPUTER SYSTEM FOR STRUCTURAL ANALYSIS AND CORRECTION OF A SYSTEM OF DIFFERENTIAL EQUATIONS DESCRIBED BY A COMPUTER LANGUAGE
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10273521
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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APPARATUS FOR ASSESSING A SILICON DIOXIDE CONTENT
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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10273524
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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04/24/2003
| | | | |
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Title:
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METHOD FOR FABRICATING AN INTEGRATED SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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10273531
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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05/01/2003
| | | | |
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Title:
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CIRCUIT FOR AN ELECTRONIC SEMICONDUCTOR MODULE
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10273759
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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PHOTOMASK AND METHOD FOR MANUFACTURING THE PHOTOMASK
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10277387
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Filing Dt:
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10/22/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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Memory cell, wafer, semiconductor component with memory cell having insulation collars and method for fabricating an insulating collar for a memory cell
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10278227
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Filing Dt:
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10/23/2002
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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METHOD FOR TESTING A PLURALITY OF DEVICES DISPOSED ON A WAFER AND CONNECTED BY A COMMON DATA LINE
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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10278232
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Filing Dt:
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10/23/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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INFORMATION CONTAINING MEANS FOR MEMORY MODULES AND MEMORY CHIPS
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Patent #:
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Issue Dt:
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12/09/2003
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Application #:
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10281697
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Filing Dt:
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10/28/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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FABRICATION METHOD AND APPARATUS FOR FABRICATING A SPATIAL STRUCTURE IN A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10281807
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Filing Dt:
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10/28/2002
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Publication #:
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Pub Dt:
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07/10/2003
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Title:
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POLYTHIOPHENE POLYMER WITH HIGH CHARGE-CARRIER MOBILITIES, METHOD FOR FABRICATING THE POLYMER, AND SEMICONDUCTOR COMPONENT AND ORGANIC FIELD EFFECT TRANSISTOR INCLUDING THE POLYMER
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10283857
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Filing Dt:
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10/30/2002
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Publication #:
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Pub Dt:
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05/01/2003
| | | | |
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Title:
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CHARGE TRAPPING MEMORY CELL, METHOD FOR FABRICATING IT, AND SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10283883
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Filing Dt:
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10/30/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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METHOD AND DEVICE FOR REDUCING THE CONTACT RESISTANCE IN ORGANIC FIELD-EFFECT TRANSISTORS BY EMBEDDING NANOPARTICLES TO PRODUCE FIELD BOOSTING
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10283913
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Filing Dt:
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10/30/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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FLOATING GATE MEMORY CELL, METHOD FOR FABRICATING IT, AND SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10283992
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Filing Dt:
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10/30/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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DYNAMIC MEMORY DEVICE AND METHOD FOR CONTROLLING SUCH A DEVICE
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10284649
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/22/2003
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Title:
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PROCESS FOR PRODUCING A SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10284773
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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CONFIGURATION FOR DATA TRANSMISSION IN A SEMICONDUCTOR MEMORY SYSTEM, AND RELEVANT DATA TRANSMISSION METHOD
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10284774
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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DEVICE FOR ACCESSING REGISTERED CIRCUIT UNITS
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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10284775
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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CONFIGURATION FOR MINIMIZING THE NEEL INTERACTION BETWEEN TWO FERROMAGNETIC LAYERS ON BOTH SIDES OF A NON-FERROMAGNETIC SEPARATING LAYER
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10284806
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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METHOD AND APPARATUS FOR REFRESHING MEMORY CELLS
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10285049
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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METHOD FOR REDUCING THE CONTACT RESISTANCE IN ORGANIC FIELD-EFFECT TRANSISTORS BY APPLYING A REACTIVE INTERMEDIATE LAYER WHICH DOPES THE ORGANIC SEMICONDUCTOR LAYER REGION-SELECTIVELY IN THE CONTACT REGION
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10285050
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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07/03/2003
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Title:
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PROCESS FOR SILYLATING PHOTORESISTS IN THE UV RANGE
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10285051
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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METHOD FOR PROCESSING DATA REPRESENTING PARAMETERS RELATING TO A PLURALITY OF COMPONENTS OF AN ELECTRICAL CIRCUIT, COMPUTER READABLE STORAGE MEDIUM AND DATA PROCESSING SYSTEM CONTAINING COMPUTER-EXECUTABLE INSTRUCTIONS FOR PERFORMING THE METHOD
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10285052
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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PROCESS FOR STRUCTURING A PHOTORESIST BY UV AT LESS THAN 160 NM AND THEN AROMATIC AND/OR ALICYCLIC AMPLIFICATION
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10285090
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Filing Dt:
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10/31/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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INTERCONNECT STRUCTURE FOR AN INTEGRATED CIRCUIT AND CORRESPONDING FABRICATION METHOD
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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10285924
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Filing Dt:
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11/01/2002
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Publication #:
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Pub Dt:
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06/19/2003
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Title:
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METHOD FOR PRODUCING AN ELECTRONIC COMPONENT HAVING A PLURALITY OF CHIPS THAT ARE STACKED ONE ABOVE THE OTHER AND CONTACT-CONNECTED TO ONE ANOTHER
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10287501
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Filing Dt:
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11/04/2002
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Publication #:
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Pub Dt:
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06/12/2003
| | | | |
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Title:
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INTEGRATED MEMORY, AND A METHOD OF OPERATING AN INTEGRATED MEMORY
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10288387
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Filing Dt:
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11/05/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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LINE CONFIGURATION FOR BIT LINES FOR CONTACT-CONNECTING AT LEAST ONE MEMORY CELL, SEMICONDUCTOR COMPONENT WITH A LINE CONFIGURATION AND METHOD FOR FABRICATING A LINE CONFIGURATION
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10288911
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Filing Dt:
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11/06/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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METHOD FOR RECONFIGURING A MEMORY
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10289826
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Filing Dt:
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11/07/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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INTEGRATED CIRCUIT HAVING A TEST CIRCUIT AND METHOD OF DECOUPLING A TEST CIRCUIT IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10289913
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Filing Dt:
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11/07/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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METHOD FOR PRECHARGING MEMORY CELLS OF A DYNAMIC SEMICONDUCTOR MEMORY DURING POWER-UP AND SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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10/12/2004
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Application #:
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10290365
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Filing Dt:
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11/07/2002
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Publication #:
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Pub Dt:
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05/22/2003
| | | | |
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Title:
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MEMORY DEVICE AND METHOD OF ACCESSING A MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10291069
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Filing Dt:
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11/08/2002
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Publication #:
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Pub Dt:
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05/08/2003
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Title:
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CIRCUIT FOR SETTING A SIGNAL PROPAGATION TIME FOR A SIGNAL ON A SIGNAL LINE AND METHOD FOR ASCERTAINING TIMING PARAMETERS
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10291070
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Filing Dt:
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11/08/2002
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Publication #:
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Pub Dt:
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05/08/2003
| | | | |
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Title:
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METHOD FOR FABRICATING A MASK FOR SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10292169
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Filing Dt:
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11/12/2002
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Publication #:
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Pub Dt:
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05/13/2004
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Title:
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SUB-RESOLUTION SIZED ASSIST FEATURES
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10292621
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Filing Dt:
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11/13/2002
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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FABRICATION METHOD FOR AN INTERCONNECT ON A SUBSTRATE
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10292847
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Filing Dt:
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11/12/2002
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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METHOD AND APPARATUS FOR FINDING A FAULT IN A SIGNAL PATH ON A PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10292866
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Filing Dt:
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11/12/2002
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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REFLECTION MASK FOR EUV-LITHOGRAPHY AND METHOD FOR FABRICATING THE REFLECTION MASK
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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10293923
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Filing Dt:
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11/13/2002
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Publication #:
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Pub Dt:
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06/26/2003
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Title:
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CIRCUIT DEVICE HAVING A FUSE
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10295710
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Filing Dt:
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11/15/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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SIGNAL DISTRIBUTION TO A PLURALITY OF CIRCUIT UNITS
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Patent #:
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Issue Dt:
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08/15/2006
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Application #:
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10298429
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
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Title:
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REFLECTION MASK AND METHOD FOR FABRICATING THE REFLECTION MASK
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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10298717
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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SIGE VERTICAL GATE CONTACT FOR GATE CONDUCTOR POST ETCH TREATMENT
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10298772
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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06/12/2003
| | | | |
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Title:
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PROCESS FOR PRODUCING A COMPONENT MODULE
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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10298837
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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06/19/2003
| | | | |
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Title:
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METHOD FOR CONNECTION OF CIRCUIT UNITS
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Patent #:
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Issue Dt:
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03/28/2006
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Application #:
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10298970
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Filing Dt:
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11/18/2002
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Publication #:
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Pub Dt:
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06/26/2003
| | | | |
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Title:
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DEVICE AND METHOD FOR ASSOCIATING INFORMATION CONCERNING MEMORY CELLS OF A MEMORY WITH AN EXTERNAL MEMORY
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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10299269
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Filing Dt:
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11/19/2002
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Publication #:
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Pub Dt:
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05/20/2004
| | | | |
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Title:
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SEMICONDUCTOR DEVICE WITH DEEP TRENCH ISOLATION AND METHOD OF MANUFACTURING SAME
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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10299750
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Filing Dt:
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11/19/2002
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
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Title:
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MEMORY, PROCESSOR SYSTEM AND METHOD FOR PERFORMING WRITE OPERATIONS ON A MEMORY REGION
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10301090
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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05/22/2003
| | | | |
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Title:
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INTEGRATED CIRCUIT HAVING A PROGRAMMABLE ELEMENT AND METHOD OF OPERATING THE CIRCUIT
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10301368
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Filing Dt:
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11/21/2002
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Publication #:
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Pub Dt:
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05/22/2003
| | | | |
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Title:
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SEMICONDUCTOR COMPONENT
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10301393
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Filing Dt:
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11/21/2002
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Publication #:
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Pub Dt:
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05/22/2003
| | | | |
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Title:
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METHOD AND SEMICONDUCTOR WAFER CONFIGURATION FOR PRODUCING AN ALIGNMENT MARK FOR SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10301398
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Filing Dt:
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11/21/2002
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Publication #:
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Pub Dt:
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05/22/2003
| | | | |
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Title:
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SEMICONDUCTOR MEMORY MODULE WITH LOW CURRENT CONSUMPTION
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10302214
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Filing Dt:
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11/22/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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DEVICE FOR SUPPLYING CONTROL SIGNALS TO MEMORY UNITS, AND A MEMORY UNIT ADAPTED THERETO
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10302615
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Filing Dt:
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11/21/2002
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
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Title:
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FLOATING GATE FIELD-EFFECT TRANSISTOR
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|
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10302805
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Filing Dt:
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11/22/2002
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
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Title:
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ARRAY OF SYNCHRONIZED MEMORY MODULES
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10304131
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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PROCESS FOR CHEMICALLY MECHANICALLY POLISHING WAFERS
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10304134
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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FIELD EFFECT TRANSISTOR AND FABRICATION METHOD
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|
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Patent #:
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Issue Dt:
|
06/06/2006
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Application #:
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10304135
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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INTEGRATED MEMORY AND METHOD OF REPAIRING AN INTEGRATED MEMORY
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Patent #:
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|
Issue Dt:
|
09/20/2005
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Application #:
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10306184
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
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Title:
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LEADFRAME OF A CONDUCTIVE MATERIAL AND COMPONENT WITH A LEADFRAME OF A CONDUCTIVE MATERIAL
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Patent #:
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Issue Dt:
|
03/22/2005
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Application #:
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10306438
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Filing Dt:
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11/27/2002
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|
Publication #:
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Pub Dt:
|
07/03/2003
| | | | |
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Title:
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SEMICONDUCTOR CHIP, FABRICATION METHOD, AND DEVICE FOR FABRICATING A SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
|
03/15/2005
|
Application #:
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10310397
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Filing Dt:
|
12/05/2002
|
|
Publication #:
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Pub Dt:
|
06/05/2003
| | | | |
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Title:
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METHOD FOR FABRICATING AN INTEGRATED SEMICONDUCTOR CIRCUIT
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|
