Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 016395/0484 | |
| Pages: | 3 |
| | Recorded: | 03/25/2005 | | |
Attorney Dkt #: | 85195-102 ADB |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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10671872
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Filing Dt:
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09/29/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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TIMESLICED DISCRETE-TIME PHASE LOCKED LOOP
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10671873
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Filing Dt:
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09/29/2003
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Publication #:
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Pub Dt:
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06/24/2004
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Title:
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Method and apparatus for reducing peak to average power ratio in QAM multi-channel blocks
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10671879
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Filing Dt:
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09/29/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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Method and apparatus for reducing the power consumption of the power amplifier used in a QAM modulator
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Assignee
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4210 COMMERCE CIRCLE, VICTORIA |
BRITISH COLUMBIA V8Z 6N6, CANADA |
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Correspondence name and address
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MR. ADRIAN D. BATTIISON
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ADE & COMPANY
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1700-360 MAIN STREET, WINNEPEG, MINATOBA
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CANADA R3C 3Z3
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