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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08654437
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Filing Dt:
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05/28/1996
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Title:
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METHOD AND APPARATUS FOR OPTIMIZATION OF DATA WRITES
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08655243
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Filing Dt:
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06/05/1996
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Title:
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METHOD OF MANUFACTURING SUBFIELD CONDUCTIVE LAYER
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08659733
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Filing Dt:
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06/06/1996
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Title:
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DATA STRUCTURE TO SUPPORT MULTIPLE TRANSMIT PACKETS FOR HIGH PERFORMANCE
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Patent #:
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Issue Dt:
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10/07/1997
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Application #:
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08672683
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Filing Dt:
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06/28/1996
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Title:
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CONSTRUCTION THAT PREVENTS THE UNDERCUT OF INTERCONNECT LINES IN PLASMA METAL ETCH SYSTEMS
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Patent #:
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Issue Dt:
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08/18/1998
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Application #:
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08673005
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Filing Dt:
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07/01/1996
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Title:
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METHOD FOR SIMPLIFYING THE MANUFACTURE OF AN INTERLAYER DIELECTRIC STACK
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08675310
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Filing Dt:
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07/01/1996
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Title:
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PROGRAMMABLE DRIVE STRENGTH OUTPUT BUFFER WITH SLEW RATE CONTROL
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08683373
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Filing Dt:
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07/18/1996
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Title:
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TEMPERATURE INSENSITIVE CURRENT SOURCE
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Patent #:
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Issue Dt:
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05/04/1999
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Application #:
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08687859
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Filing Dt:
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07/26/1996
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Title:
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VERTICAL WAVETABLE CACHE ARCHITECTURE IN WHICH THE NUMBER OF QUEUES IS SUBSTANTIALLY SMALLER THAN THE TOTAL NUMBER OF VOICES STORED IN THE SYSTEM MEMORY
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08692689
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Filing Dt:
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08/06/1996
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Title:
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METHOD AND APPARATUS FOR PRIORITIZING TRAFFIC IN HALF-DUPLEX NETWORKS
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08698102
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Filing Dt:
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08/15/1996
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Title:
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A SYSTEM FOR SELECTIVELY REDUCING CAPTURE EFFECT IN A NETWORK STATION BY INCREASING DELAY TIME AFTER A PREDETERMINED NUMBER OF CONSECUTIVE SUCCESSFUL TRANSMISSIONS
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08702057
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Filing Dt:
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08/23/1996
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Title:
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METHOD OF OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08702058
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Filing Dt:
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08/23/1996
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Title:
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MASK FOR OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING AND INTEGRATED CIRCUIT PRODUCED THEREFROM
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08706212
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Filing Dt:
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08/30/1996
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Title:
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DYNAMIC LATCHING DEVICE
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Patent #:
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Issue Dt:
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06/16/1998
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Application #:
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08711112
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Filing Dt:
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09/09/1996
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Title:
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METHOD OF OPTICAL LITHOGRAPHY USING PHASE SHIFT MASKING
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Patent #:
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Issue Dt:
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11/10/1998
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Application #:
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08740119
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Filing Dt:
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10/23/1996
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Title:
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HIERARCHICAL SCAN LOGIC FOR OUT-OF-ORDER LOAD/STORE EXECUTION CONTROL
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08745410
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Filing Dt:
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11/22/1996
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Title:
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OUTPUT BUFFER INCORPORATING SHARED INTERMEDIATE NODES
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Patent #:
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Issue Dt:
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04/14/1998
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Application #:
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08746915
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Filing Dt:
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11/19/1996
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Title:
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LOW-VOLTAGE RAIL-TO-RAIL OPERATIONAL AMPLIFIER
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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08752691
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Filing Dt:
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11/19/1996
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Title:
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BRANCH PREDICTION MECHANISM EMPLOYING BRANCH SELECTORS TO SELECT A BRANCH PREDICTION
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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08754564
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Filing Dt:
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11/21/1996
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Title:
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BORDERLESS VIAS ON BOTTOM METAL
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08757115
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Filing Dt:
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12/02/1996
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Title:
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SYSTEM AND METHOD FOR ROUTING OPERANDS WITHIN PARTITIONS OF A SOURCE REGISTER TO PARTITIONS WITHIN A DESTINATION REGISTER
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08764212
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Filing Dt:
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12/13/1996
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Title:
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MULTIPLE PARALLEL IDENTICAL FINITE STATE MACHINES WHICH SHARE COMBINATORIAL LOGIC
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08769009
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Filing Dt:
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12/20/1996
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Title:
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NON-VOLATILE MEMORY ARRAY THAT ENABLES SIMULTANEOUS READ AND WRITE OPERATIONS
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08769065
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Filing Dt:
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12/18/1996
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Title:
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LATCHUP-PROOF I/O CIRCUIT IMPLEMENTATION
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08770012
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Filing Dt:
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12/19/1996
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Title:
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COMPUTER SYSTEM AND METHOD FOR IMPLEMENTING DELAY-BASED EFFECTS USING SYSTEM MEMORY
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Patent #:
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Issue Dt:
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11/02/1999
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Application #:
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08775262
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Filing Dt:
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02/04/1997
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Title:
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SYSTEM FOR PERFORMING DMA TRANSFERS WHERE AN INTERRUPT REQUEST SIGNAL IS GENERATED BASED ON THE LAST OF A PLURALITY OF DATA BITS TRANSMITTED
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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08785389
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Filing Dt:
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01/21/1997
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Title:
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ORGANIZATION OF AN INTEGRATED CACHE UNIT FOR FLEXIBLE USAGE IN SUPPORTING MULTIPROCESSOR OPERATIONS
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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08785491
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Filing Dt:
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01/17/1997
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Title:
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INSTALLING OPERATING SYSTEMS CHANGES ON A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08786428
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Filing Dt:
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01/21/1997
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Title:
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STATIC RANDOM ACCESS MEMORY CELL UTILIZING ENHANCEMENT MODE N-CHANNEL TRANSISTORS AS LOAD ELEMENTS
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Patent #:
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Issue Dt:
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04/06/1999
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Application #:
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08790393
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Filing Dt:
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01/29/1997
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Title:
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DISTRIBUTED GATED CLOCK DRIVER
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Patent #:
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Issue Dt:
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07/14/1998
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Application #:
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08790886
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Filing Dt:
|
02/03/1997
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Title:
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BACKSIDE WAFER POLISHING FOR IMPROVED PHOTOLITHOGRAPHY
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08798991
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Filing Dt:
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02/11/1997
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Title:
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POWER SUPPLY SOLUTION FOR MIXED SIGNAL CIRCUITS
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08799452
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Filing Dt:
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02/13/1997
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Title:
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METHOD AND CIRCUIT FOR FAST GENERATION OF ZERO FLAG CONDITION CODE IN A MICROPROCESSOR-BASED COMPUTER
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Patent #:
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Issue Dt:
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04/13/1999
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Application #:
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08806430
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Filing Dt:
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02/26/1997
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Title:
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PROCESSOR LOCAL BUS FREQUENCY DETECTION CIRCUIT
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08811485
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Filing Dt:
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03/05/1997
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Title:
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METHOD AND ARRANGEMENT FOR PROVIDING MULTI-LEVEL PRIORITY IN A ROTATING PRIORITY ARRANGEMENT FOR ACCESS TO MEDIUM IN AN ETHERNET NETWORK
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Patent #:
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Issue Dt:
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11/24/1998
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Application #:
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08811683
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Filing Dt:
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03/05/1997
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Title:
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NON-VOLATILE MEMORY ENABLING SIMULTANEOUS READING AND WRITING BY TIME MULTIPLEXING A DECODE PATH
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08812217
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Filing Dt:
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03/06/1997
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Title:
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DIGITAL AUDIO SYSTEM INCLUDING A SOFTWARE CONTROLLED PHASE LOCK LOOP FOR SYNCHRONIZING AUDIO SOURCES TO A COMMON CLOCK SOURCE
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Patent #:
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Issue Dt:
|
09/08/1998
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Application #:
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08812632
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Filing Dt:
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03/07/1997
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Title:
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VARIABLE CAPACITOR BASED ON FREQUENCY OF OPERATION
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Patent #:
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Issue Dt:
|
06/09/1998
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Application #:
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08812931
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Filing Dt:
|
03/04/1997
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Title:
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DYNAMIC RAM WITH TWO-TRANSISTOR CELL
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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08813021
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Filing Dt:
|
03/07/1997
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|
Title:
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DEPOSITION OF SUPER THIN PECVD SIO2 IN MULTIPLE DEPOSITION STATION SYSTEM
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Patent #:
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Issue Dt:
|
06/01/1999
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Application #:
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08813727
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Filing Dt:
|
03/07/1997
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Title:
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METHOD AND APPARATUS FOR BANKING ADDRESSES FOR DRAMS
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Patent #:
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|
Issue Dt:
|
08/11/1998
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Application #:
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08814397
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Filing Dt:
|
03/11/1997
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|
Title:
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LOW POWER REGISTER MEMORY ELEMENT CIRCUITS
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Patent #:
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|
Issue Dt:
|
12/01/1998
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Application #:
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08822518
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Filing Dt:
|
03/24/1997
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|
Title:
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MEMORY CELL HAVING INCREASED CAPACITANCE VIA A LOCAL INTERCONNECT TO GATE CAPACITOR AND A METHOD FOR MAKING SUCH A CELL
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Patent #:
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Issue Dt:
|
06/23/1998
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Application #:
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08823046
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Filing Dt:
|
03/21/1997
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|
Title:
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SEMICONDUCTOR FABRICATION EMPLOYING COPPER PLUG FORMATION WITHIN A CONTACT AREA
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Patent #:
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|
Issue Dt:
|
10/10/2000
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Application #:
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08823081
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Filing Dt:
|
03/24/1997
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|
Title:
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STATIC RANDOM ACCESS MEMORY CELL HAVING BURIED SIDEWALL CAPACITORS BETWEEN STORAGE NODES
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Patent #:
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Issue Dt:
|
03/30/1999
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Application #:
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08839836
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Filing Dt:
|
04/17/1997
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Title:
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SYSTEM AND METHOD FOR MONITORING PERFORMANCE OF WIRELESS LAN AND DYNAMICALLY ADJUSTING ITS OPERATING PARAMETERS
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Patent #:
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Issue Dt:
|
05/04/1999
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Application #:
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08843462
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Filing Dt:
|
04/16/1997
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Title:
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RIPPLE CARRY SHIFTER IN A FLOATING POINT ARITHMETIC UNIT OF A MICROPROCESSOR
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Patent #:
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Issue Dt:
|
03/14/2000
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Application #:
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08850853
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Filing Dt:
|
05/02/1997
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Title:
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METHOD FOR GROWING DUAL OXIDE THICKNESSES USING NITRIDED OXIDES FOR OXIDATION SUPPRESSION
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Patent #:
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Issue Dt:
|
06/07/2005
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Application #:
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08857055
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Filing Dt:
|
05/15/1997
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Title:
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PROCESS FOR FORMING BOTTOM ANTI-REFLECTION COATING FOR SEMICONDUCTOR FABRICATION PHOTOLITHOGRAPHY WHICH INHIBITS PHOTORESIST FOOTING
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|
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Patent #:
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Issue Dt:
|
10/19/1999
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Application #:
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08857129
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Filing Dt:
|
05/15/1997
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Title:
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PLATED COPPER INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
11/10/1998
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Application #:
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08863123
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Filing Dt:
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05/27/1997
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Title:
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VIDEO REFRESH COMPRESSION
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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08872017
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Filing Dt:
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06/09/1997
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Title:
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APPARATUS AND METHOD FOR SELECTIVELY CONTROLLING TRANSMISSION OF CONSECUTIVE PACKETS IN A NETWORK STATION
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Patent #:
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Issue Dt:
|
11/09/1999
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Application #:
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08874877
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Filing Dt:
|
06/13/1997
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Title:
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STATIC RANDOM ACCESS MEMORY CELL HAVING BURIED SIDEWALL TRANSISTORS, BURIED BIT LINES, AND BURIED VDD AND VSS NODES
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Patent #:
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Issue Dt:
|
07/06/1999
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Application #:
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08876213
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Filing Dt:
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06/16/1997
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Title:
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ZERO CURRENT DRAW CIRCUIT FOR USE DURING A BONDING OPTION
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Patent #:
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Issue Dt:
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04/11/2000
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Application #:
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08881067
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Filing Dt:
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06/24/1997
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Title:
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SYSTEM AND METHOD FOR ACTIVATING OF A REMOTE NODE OF A NETWORK WHEN IN SLEEP MODE
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Patent #:
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Issue Dt:
|
04/25/2000
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Application #:
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08881498
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Filing Dt:
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06/24/1997
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Title:
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VERY THIN PECVD SIO2 IN O.5 MICRON AND 0.35 MICRON TECHNOLOGIES
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Patent #:
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Issue Dt:
|
12/01/1998
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Application #:
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08884819
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Filing Dt:
|
06/30/1997
|
|
Title:
|
WAY PREDICTION STACTURE FOR PREDICING THE OF A CACHE IN WHICH AN ACCESS HITS, THEREBY SPEEDING CACHE ACRESS TIME
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|
|
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Patent #:
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|
Issue Dt:
|
11/09/1999
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Application #:
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08892551
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Filing Dt:
|
07/14/1997
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|
Title:
|
PERFORMANCE OF VIDEO DECOMPRESSION BY USING BLOCK ORIENTED DATA STRUCTURES
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/20/2000
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Application #:
|
08896099
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Filing Dt:
|
07/17/1997
|
|
Title:
|
APPARATUS AND METHOD FOR SELECTIVELY MODIFYING COLLISION DELAY INTERVALS BASED ON A DETECTED CAPTURE EFFECT IN A HALF-DUPLEX NETWORK
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|
|
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Patent #:
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Issue Dt:
|
09/28/1999
|
Application #:
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08903704
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Filing Dt:
|
07/31/1997
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|
Title:
|
STATE MACHINE BASED BUS CYCLE COMPLETION CHECKING IN A BUS BRIDGE VERIFICATION SYSTEM
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Patent #:
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Issue Dt:
|
08/24/1999
|
Application #:
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08914263
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Filing Dt:
|
08/19/1997
|
|
Title:
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CHIP TEMPERATURE PROTECTION USING DELAY LINES
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|
|
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Patent #:
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Issue Dt:
|
06/13/2000
|
Application #:
|
08916894
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Filing Dt:
|
08/22/1997
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|
Title:
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NEUTRON DETECTING SEMICONDUCTOR DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
07/20/1999
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Application #:
|
08918062
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Filing Dt:
|
08/25/1997
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Title:
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SYSTEM FOR ENHANCING THE PERFORMANCE OF A CIRCUIT BY REDUCING THE CHANNEL LENGTH OF ONE OR MORE TRANSISTORS
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|
|
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Patent #:
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|
Issue Dt:
|
09/28/1999
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Application #:
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08920930
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Filing Dt:
|
08/29/1997
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Title:
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SYSTEM HAVING A RECEIVE DATA REGISTER FOR STORING AT LEAST NINE DATA BITS OF FRAME AND STATUS BITS INDICATING THE STATUS OF ASYNCHRONOUS SERIAL RECEIVER
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Patent #:
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Issue Dt:
|
05/04/1999
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Application #:
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08921078
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Filing Dt:
|
08/29/1997
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Title:
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SYSTEM FOR DYNAMICALLY RECONFIGURING SUBBUSSES OF DATA BUS ACCORDING TO SYSTEM NEEDS BASED ON MONITORING EACH OF THE INFORMATION CHANNELS MAKE UP DATA BUS
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Patent #:
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Issue Dt:
|
05/09/2000
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Application #:
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08924130
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Filing Dt:
|
09/05/1997
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Title:
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IN-SITU DEPOSITION OF STOP LAYER AND DIELECTRIC LAYER DURING FORMATION OF LOCAL INTERCONNECTS
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Patent #:
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Issue Dt:
|
10/19/1999
|
Application #:
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08924131
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Filing Dt:
|
09/05/1997
|
|
Title:
|
BORDERLESS VIAS WITH CVD BARRIER LAYER
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|
|
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Patent #:
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Issue Dt:
|
10/26/1999
|
Application #:
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08924639
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Filing Dt:
|
09/05/1997
|
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE CONTAINING SHALLOW LDD JUNCTIONS
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|
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Patent #:
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Issue Dt:
|
11/23/1999
|
Application #:
|
08926583
|
Filing Dt:
|
09/04/1997
|
|
Title:
|
METHOD OF FABRICATING TOPSIDE STRUCTURE OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
04/06/1999
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Application #:
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08935531
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Filing Dt:
|
09/23/1997
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Title:
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CACHE STRUCTURE HAVING A REDUCED TAG COMPARISON TO ENABLE DATA TRANSFER FROM SAID CACHE
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Patent #:
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Issue Dt:
|
05/25/1999
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Application #:
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08937676
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Filing Dt:
|
09/25/1997
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|
Title:
|
FOUR TRANSISTOR SRAM CELL
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Patent #:
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Issue Dt:
|
03/28/2000
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Application #:
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08937915
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Filing Dt:
|
09/25/1997
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Title:
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METHOD FOR REDUCING ELECTROMIGRATION IN A COPPER INTERCONNECT
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|
|
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Patent #:
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|
Issue Dt:
|
07/06/1999
|
Application #:
|
08938062
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Filing Dt:
|
09/26/1997
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|
Title:
|
REGISTER-BASED REDUNDANCY CIRCUIT AND METHOD FOR BUILT-IN SELF-REPAIR IN A SEMICONDUCTOR MEMORY DEVICE
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|
|
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Patent #:
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|
Issue Dt:
|
12/07/1999
|
Application #:
|
08938063
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Filing Dt:
|
09/26/1997
|
|
Title:
|
ACTIVE POWER SUPPLY FILTER
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|
|
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Patent #:
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|
Issue Dt:
|
04/25/2000
|
Application #:
|
08938077
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Filing Dt:
|
09/26/1997
|
|
Title:
|
SELF-TIMED DIFFERENTIAL COMPARATOR
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|
|
|
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Patent #:
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Issue Dt:
|
06/22/1999
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Application #:
|
08938205
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Filing Dt:
|
09/26/1997
|
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Title:
|
CROSS CLOCK DOMAIN CLOCKING FOR A SYSTEM USING TWO CLOCK FREQUENCIES WHERE ONE FREQUENCY IS FRACTIONAL MULTIPLE OF THE OTHER
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|
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Patent #:
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Issue Dt:
|
10/05/1999
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Application #:
|
08938392
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Filing Dt:
|
09/26/1997
|
|
Title:
|
TEMPERATURE SENSOR INTEGRAL WITH MICROPROCESSOR AND METHODS OF USING SAME
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|
|
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|
Patent #:
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|
Issue Dt:
|
11/24/1998
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Application #:
|
08938590
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Filing Dt:
|
09/26/1997
|
|
Title:
|
DUAL COMPARATOR CIRCUIT AND METHOD FOR SELECTING BETWEEN NORMAL AND REDUNDANT DECODE LOGIC IN A SEMICONDUCTOR MEMORY DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
08938718
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Filing Dt:
|
09/26/1997
|
|
Title:
|
MEMORY INTERFACE CIRCUIT INCLUDING BYPASS DATA FORWARDING WITH ESSENTIALLY NO DELAY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/22/1999
|
Application #:
|
08938734
|
Filing Dt:
|
09/26/1997
|
|
Title:
|
SCANNABLE SENSE AMPLIFIER CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08939016
|
Filing Dt:
|
09/26/1997
|
|
Title:
|
APPLICATION-SPECIFIC SRAM MEMORY CELL FOR LOW VOLTAGE, HIGH SPEED OPERATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08943658
|
Filing Dt:
|
10/03/1997
|
|
Title:
|
APPARATUS FOR CONVERTING DATA BETWEEN DIFFERENT ENDIAN FORMATS AND SYSTEM AND METHOD EMPLOYING SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08951592
|
Filing Dt:
|
10/16/1997
|
|
Title:
|
BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED METAL LAYERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08957596
|
Filing Dt:
|
10/24/1997
|
|
Title:
|
BRANCH SELECTORS ASSOCIATED WITH BYTE RANGES WITHIN AN INSTRUCTION CACHE FOR RAPIDLY IDENTIFYING BRANCH PREDICTIONS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
10/12/1999
|
Application #:
|
08967418
|
Filing Dt:
|
11/11/1997
|
|
Title:
|
SYSTEM AND METHOD TO CONTROL MICROPROCESSOR STARTUP TO REDUCE POWER SUPPLY BULK CAPACITANCE NEEDS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08971357
|
Filing Dt:
|
11/17/1997
|
|
Title:
|
ON-CHIP OPERATING CONDITION RECORDER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08971574
|
Filing Dt:
|
11/17/1997
|
|
Title:
|
CHIP OPERATING CONDITIONS COMPENSATED CLOCK GENERATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08972093
|
Filing Dt:
|
11/17/1997
|
|
Title:
|
APPARATUS AND METHOD FOR REMOTE WAKE-UP IN SYSTEM HAVING INTERLINKED NETWORKS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08972988
|
Filing Dt:
|
11/19/1997
|
|
Title:
|
BRANCH SELECTOR PREDICTION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
08991742
|
Filing Dt:
|
12/16/1997
|
|
Title:
|
LOCAL INTERCONNECT PATTERNING AND CONTACT FORMATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
08992333
|
Filing Dt:
|
12/17/1997
|
|
Title:
|
PROCESS FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING IMPROVED PHOSPHOROUS-DOPED SILICON DIOXIDE DIELECTRIC FILM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
08992628
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
LOWER METAL FEATURE PROFILE WITH OVERHANGING ARC LAYER TO IMPROVE ROBUSTNESS OF BORDERLESS VIAS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08992796
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
RANDOM ACCESS MEMORY HAVING BIT SELECTABLE MASK FOR MEMORY WRITES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2001
|
Application #:
|
08992925
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
METHOD AND APPARATUS FOR MAINTAINING A TIME ORDER BY PHYSICAL ORDERING IN A MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
08992963
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
CIRCUIT AND METHOD FOR MULTILEVEL SIGNAL DECODING, DESCRAMBLING, AND ERROR DETECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08992965
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
HSQ DIELECTRIC INTERLAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
08993051
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
ELECTROMIGRATION RESISTANT PATTERNED METAL LAYER GAP FILLED WITH HSQ
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2000
|
Application #:
|
08993055
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
METHOD AND APPARATUS FOR ADJUSTING OVERFLOW BUFFERS AND FLOW CONTROL WATERMARK LEVELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08993081
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
AMPLIFIER-BASED FLIP-FLOP ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2002
|
Application #:
|
08993122
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
METHOD AND SYSTEM FOR SWITCHING BETWEEN A TOTEM-POLE DRIVE MODE AND AN OPEN-DRAIN DRIVE MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2000
|
Application #:
|
08993124
|
Filing Dt:
|
12/18/1997
|
|
Title:
|
HIGH INTEGRITY BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED CONDUCTIVE LAYERS
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|
