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Patent #:
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Issue Dt:
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02/08/2000
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Application #:
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08993828
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Filing Dt:
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12/18/1997
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Title:
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METHODS FOR MAKING A SEMICONDUCTOR DEVICE WITH IMPROVED HOT CARRIER LIFETIME
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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08993835
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Filing Dt:
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12/18/1997
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Title:
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METHOD AND NETWORK SWITCH HAVING DUAL FORWARDING MODELS WITH A VIRTUAL LAN OVERLAY
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08994144
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Filing Dt:
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12/19/1997
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Title:
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DIFFERENTIAL COMPARATOR WITH AN EXTENDED INPUT RANGE
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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08994869
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Filing Dt:
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12/19/1997
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Title:
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BRANCH PREDICTION WITH ADDED SELECTOR BITS TO INCREASE BRANCH PREDICTION CAPACITY AND FLWXIBILITY WITH MINIMAL ADDED BITS
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08995119
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Filing Dt:
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12/19/1997
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Title:
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METHOD AND CIRCUIT FOR PERFORMING A SHIFT ARITHMETIC RIGHT OPERATION
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Patent #:
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Issue Dt:
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12/21/1999
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Application #:
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09008320
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Filing Dt:
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01/20/1998
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Title:
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CORE ARRAY AND PERIPHERY ISOLATION TECHNIQUE
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Patent #:
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Issue Dt:
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09/21/1999
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Application #:
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09013762
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Filing Dt:
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01/27/1998
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Title:
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COPPER-CONTAINING PLUG FOR CONNECTION OF SEMICONDUCTOR SURFACE OVERLYING CONDUCTOR
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09021350
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Filing Dt:
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02/10/1998
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Title:
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LOGIC SYSTEM AND METHOD EMPLOYING MULTIPLE CONFIGURABLE LOGIC BLOCKS AND CAPABLE OF IMPLEMENTING A STATE MACHINE USING A MINIMUM AMOUNT OF CONFIGURABLE LOGIC
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09028611
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Filing Dt:
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02/24/1998
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Title:
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DYNAMICALLY RECONFIGURABLE LOGIC NETWORKS INTERCONNECTED BY FALL-THROUGH FIFOS FOR FLEXIBLE PIPELINE PROCESSING IN A SYSTEM-ON-A-CHIP
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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09028960
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Filing Dt:
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02/23/1998
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Title:
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DYNAMIC LATCH CIRCUITRY
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09033178
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Filing Dt:
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03/02/1998
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Title:
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MEMORY INCLUDING LOGIC FOR OPERATING UPON GRAPHICS PRIMITIVES
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Patent #:
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Issue Dt:
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10/12/1999
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Application #:
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09036288
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Filing Dt:
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03/06/1998
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Title:
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METHOD OF FORMING DUAL FIELD ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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09036868
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Filing Dt:
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03/09/1998
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Title:
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A MICROCONTROLLER WITH A SYNCHRONOUS SERIAL INTERFACE AND A TWO- CHANNEL DMA UNIT CONFIGURED TOGETHER FOR PROVIDING DMA REQUESTS TO THE FIRST AND SECOND DMA CHANNEL
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09038464
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Filing Dt:
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03/11/1998
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Title:
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SUBFIELD CONDUCTIVE LAYER AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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09040087
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Filing Dt:
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03/17/1998
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Title:
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SCAN CHAINS FOR OUT-OF ORDER LOAD/STORE EXECUTION CONTROL
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09044750
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Filing Dt:
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03/19/1998
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Title:
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METHOD AND APPARATUS FOR MONITORING UNIVERSAL SERIAL BUS ACTIVITY
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09049789
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Filing Dt:
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03/27/1998
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Title:
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METHOD AND APPARATUS FOR SIMULTANEOUSLY MULTIPLYING TWO OR MORE INDEPENDENT PAIRS OF OPERANDS AND SUMMING THE PRODUCTS
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09055648
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Filing Dt:
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04/06/1998
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Title:
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LIGHTLY DOPED DRAIN FORMATION INTEGRATED WITH SOURCE/DRAIN FORMATION FOR HIGH-PERFORMANCE TRANSISTOR FORMATION
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09057055
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Filing Dt:
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04/08/1998
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Title:
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METHOD AND APPARATUS FOR PERFORMING OVERSHIFTED ROTATE THROUGH CARRY INSTRUCTIONS BY SHIFTING IN OPPOSITE DIRECTIONS
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09057271
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Filing Dt:
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04/08/1998
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Title:
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METHOD AND CIRCUIT FOR DETECTING OVERFLOW IN OPERAND MULTIPLICATION
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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09057418
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Filing Dt:
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04/08/1998
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Title:
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"CIRCUIT AND METHOD FOR DETERMINING OVERFLOW IN SIGNED DIVISION"
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09061252
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Filing Dt:
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04/17/1998
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Title:
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APPARATUS AND METHOD FOR DETERMINING AN OPTIMUM EQUALIZER SETTING FOR A SIGNAL EQUALIZER IN A COMMUNICATION NETWORK RECEIVER
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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09067990
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Filing Dt:
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04/29/1998
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Title:
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BRANCH PREDICTION MECHANISM EMPLOYING BRANCH SELECTORS TO SELECT A BRANCH PREDICTION
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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09074786
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Filing Dt:
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05/08/1998
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Title:
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A SYSTEM AND METHOD FOR TASKING PROCESSING MODULES BASED UPON TEMPERATURE
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Patent #:
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Issue Dt:
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10/17/2000
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Application #:
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09075073
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Filing Dt:
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05/08/1998
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Title:
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METHOD AND APPARATUS FOR ACHIEVING HIGHER FREQUENCIES OF EXACTLY ROUNDED RESULTS
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09075418
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Filing Dt:
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05/08/1998
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Title:
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METHOD AND APPARATUS FOR COMPRESSING INTERMEDIATE PRODUCTS
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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09085509
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Filing Dt:
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05/27/1998
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Title:
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CLOCK GENERATOR WITH MULTIPLE FEEDBACK PATHS INCLUDING A DELAY LOCKED LOOP PATH
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09088610
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Filing Dt:
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06/01/1998
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Title:
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SYSTEM PROVIDING ADDRESS MATCHING USING ADDRESS MATCH BITS IN ADDITION OF CHARACTER MATCHING, SO THAT CAN DETECT WHEN A PARTICULAR MICROCONTROLLER ADDRESSED BY MATCHING ADDRESS BIT
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09095268
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Filing Dt:
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06/10/1998
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Title:
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WAVETABLE CACHE USING SIMPLIFIED LOOPING
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09097126
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Filing Dt:
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06/12/1998
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Title:
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METHOD FOR MANUFACTURING SEMICONDUCTORS WITH SELF-ALIGNING VIAS
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09098854
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Filing Dt:
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06/17/1998
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Title:
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COMMUNICATION LINK WITH ISOCHRONOUS AND ASYNCRONOUS PRIORITY MODES
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09098876
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Filing Dt:
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06/17/1998
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Title:
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WRITE ONLY BUS WITH WHOLE AND HALF BUS MODE OPERATION
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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09099227
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Filing Dt:
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06/17/1998
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Title:
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METHOD OF MODE CONTROL IN A BUS OPTIMIZED FOR PERSONAL COMPUTER DATA TRAFFIC
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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09099691
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Filing Dt:
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06/18/1998
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Title:
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POWER SURGE MANAGEMENT FOR HIGH PERFORMANCE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/11/2001
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Application #:
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09105775
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Filing Dt:
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06/26/1998
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Publication #:
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Pub Dt:
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01/10/2002
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Title:
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METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25U AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOSITION RATE AND SEMICONDUCTOR CHIP MADE THEREBY
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09109574
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Filing Dt:
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07/02/1998
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Title:
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SYSTEM FOR ENHANCING THE PERFORMANCE OF A CIRCUIT BY REDUCING THE CHANNEL LENGTH OF ONE OR MORE TRANSISTORS
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Patent #:
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Issue Dt:
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04/18/2000
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Application #:
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09111815
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Filing Dt:
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07/08/1998
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Title:
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UPGRADEABLE MICROPROCESSOR AND MOTHERBOARD
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09112158
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Filing Dt:
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07/09/1998
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Title:
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METHOD OF FORMING RELIABLE CAPPED COPPER INTERCONNECTS
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09130509
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Filing Dt:
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08/06/1998
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Title:
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VIDEO REFRESH COMPRESSION
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09131872
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Filing Dt:
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08/10/1998
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Title:
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METHOD OF RELIABLY CAPPING COPPER INTERCONNECTS
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09137579
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Filing Dt:
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08/21/1998
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Title:
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BASIC BLOCK ORIENTED TRACE CACHE UTILIZING A BASIC BLOCK SEQUENCE BUFFER TO INDICATE PROGRAM ORDER OF CACHED BASIC BLOCKS
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09139584
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Filing Dt:
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08/25/1998
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Title:
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METHOD FOR ENABLING AND CONFIGURING AN AGP CHIPSET CACHE USING A REGISTRY
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09140602
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Filing Dt:
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08/26/1998
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Title:
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START-UP CIRCUIT FOR WRITE SELECTS AND EQUILIBRATES
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09140640
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Filing Dt:
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08/26/1998
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Title:
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APPARATUS AND METHOD FOR EQUALIZING RECEIVED NETWORK SIGNALS USING A SINGLE ZERO HIGH-PASS FILTER HAVING SELECTABLE IMPEDANCE
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09140833
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Filing Dt:
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08/26/1998
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Title:
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APPARATUS AND METHOD FOR EQUALIZING RECEIVED NETWORK SIGNALS USING A TRANSCONDUCTANCE CONTROLLED SINGLE ZERO SINGLE POLE FILTER
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Patent #:
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Issue Dt:
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05/23/2000
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Application #:
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09144319
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Filing Dt:
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08/31/1998
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Title:
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CORE SECTION HAVING ASYNCHRONOUS PARTIAL RESET
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Patent #:
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Issue Dt:
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11/30/1999
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Application #:
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09157240
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Filing Dt:
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09/18/1998
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Title:
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SURFACE TREATMENT OF LOW-K SIOF TO PREVENT METAL INTERACTION
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09157627
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Filing Dt:
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09/21/1998
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Title:
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SEMICONDUCTOR DEVICE WITH SELF-ALIGNED METAL-CONTAINING GATE
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Patent #:
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Issue Dt:
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04/04/2000
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Application #:
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09157708
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Filing Dt:
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09/21/1998
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Title:
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OUTPUT BUFFER INCLUDING AN APPLICATION-SPECIFIC SRAM MEMORY CELL FOR LOW VOLTAGE, HIGH SPEED OPERATION
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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09163601
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Filing Dt:
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09/30/1998
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Title:
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HARD MASK FOR METAL PATTERNING
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Patent #:
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Issue Dt:
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04/04/2000
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Application #:
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09168354
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Filing Dt:
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10/07/1998
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Title:
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PROCESSOR WITH SHORT SET-UP AND HOLD TIMES FOR BUS SIGNALS
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09169347
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Filing Dt:
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10/09/1998
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Title:
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HIERARCHICAL TEXTURE CACHE
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09170335
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Filing Dt:
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10/13/1998
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Title:
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POWER SUPPLY INDEPENDENT TEMPERATURE SENSOR
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Patent #:
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Issue Dt:
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08/15/2000
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Application #:
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09170427
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Filing Dt:
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10/13/1998
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Title:
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APPARATUS AND METHOD FOR EQUALIZING RECEIVED NETWORK SIGNALS USING A TRANSCONDUCTANCE CONTROLLED BIQUADRATIC EQUALIZER
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09176737
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Filing Dt:
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10/21/1998
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Publication #:
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Pub Dt:
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05/24/2001
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Title:
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SYSTEM AND METHOD FOR PROCESSOR DUAL VOLTAGE DETECTION AND OVER STRESS PROTECTION
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Patent #:
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Issue Dt:
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05/09/2000
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Application #:
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09177482
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Filing Dt:
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10/23/1998
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Title:
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BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED METAL LAYERS
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Patent #:
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Issue Dt:
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12/18/2001
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Application #:
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09183945
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Filing Dt:
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10/31/1998
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Title:
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UART AUTOMATIC PARITY SUPPORT FOR FRAMES WITH ADDRESS BITS
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09186781
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Filing Dt:
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11/04/1998
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Title:
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BARRIER MATERIALS FOR METAL INTERCONNECT
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09186920
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Filing Dt:
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11/06/1998
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Title:
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BILAYER ANTI-REFLECTIVE COATING AND ETCH HARD MASK
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09187523
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Filing Dt:
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11/06/1998
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Title:
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CMOS PROCESSING EMPLOYING ZERO DEGREE HALO IMPLANT FOR P-CHANNEL TRANSISTOR
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09187852
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Filing Dt:
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11/06/1998
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Title:
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MAINTAINING OBJECT INFORMATION CONCURRENT WITH DATA OPTIMIZATION FOR DEBUGGING
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Patent #:
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Issue Dt:
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10/12/1999
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Application #:
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09189922
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Filing Dt:
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11/12/1998
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Title:
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GRADED PB FOR C4 PUMP TECHNOLOGY
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09191763
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Filing Dt:
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11/13/1998
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Title:
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INTERLAYER BETWEEN TITANIUM NITRIDE AND HIGH DENSITY PLASMA OXIDE
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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09203461
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Filing Dt:
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12/02/1998
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Title:
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ULTRA-THIN RESIST AND NITRIDE/OXIDE HARD MASK FOR METAL ETCH
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09203754
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Filing Dt:
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12/02/1998
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Title:
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INTEGRATION OF LOW-K SIOF FOR DAMASCENE STRUCTURE
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09205444
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Filing Dt:
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12/04/1998
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Title:
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PROCESSOR EMPLOYING MULTIPLE REGISTER SETS TO ELIMINATE INTERRUPTS
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Patent #:
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Issue Dt:
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04/04/2000
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Application #:
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09205978
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Filing Dt:
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12/04/1998
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Title:
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METHOD AND APPARATUS FOR OPTIMIZING MEMORY PERFORMANCE WITH OPPORTUNISTIC REFRESHING
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09224822
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Filing Dt:
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01/04/1999
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Title:
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BANK HISTORY TABLE FOR IMPROVED PRE-CHARGE SCHEDULING OF RANDOM ACCESS MEMORY BANKS
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09231649
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Filing Dt:
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01/15/1999
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Title:
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INTEGRATION OF LOW-K SIOF AS INTER-LAYER DIELECTRIC FOR AL-GAPFILL APPLICATION
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09233849
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Filing Dt:
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01/19/1999
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Title:
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PROCESS FOR FORMING ANTI-REFLECTIVE FILM FOR SEMICONDUCTOR FABRICATION USING EXTREMELY SHORT WAVELENGTH DEEP ULTRAVIOLET PHOTOLITHOGRAPHY
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09236025
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Filing Dt:
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01/22/1999
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Title:
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INSITU HARDMASK AND METAL ETCH IN A SINGLE ETCHER
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09247334
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Filing Dt:
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02/10/1999
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Title:
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AUTOMATIC RECOVERY FROM CLOCK SIGNAL LOSS
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09248274
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Filing Dt:
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02/11/1999
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Title:
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TRANSCONDUCTANCE COMPENSATION FOR PROCESS VARIATION IN EQUALIZERS
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09249988
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Filing Dt:
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02/13/1999
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Title:
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DECOUPLING CAPACITOR CONFIGURATION FOR INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09263394
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Filing Dt:
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03/05/1999
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Title:
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METHOD OF FORMING FOUR TRANSISTOR SRAM CELL HAVING A RESISTOR
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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09263948
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Filing Dt:
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03/08/1999
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Title:
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TWO-PART MEMORY ADDRESS GENERATOR
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09281905
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Filing Dt:
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03/31/1999
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Title:
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DRIVER WITH SWITCHABLE GAIN
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09290048
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Filing Dt:
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04/12/1999
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Title:
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ACOUSTIC NOISE SUPPRESSING CIRCUIT BY SELECTIVE ENABLEMENT OF AN INTERPOLATOR
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09291036
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Filing Dt:
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04/14/1999
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Title:
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AUTO-NEGOTIATION USING NEGATIVE LINK PULSES
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09291984
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Filing Dt:
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04/14/1999
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Title:
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FAST CHIP ERASE MODE FOR NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09292769
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Filing Dt:
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04/14/1999
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Title:
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SYSTEM FOR MAKING ELECTROPHORETIC DIES WHILE REDUCING DAMAGE DUE TO ELECTROSTATIC CHARGE
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09295357
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Filing Dt:
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04/21/1999
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Title:
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WIRE BONDING CU INTERCONNECTS
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Patent #:
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Issue Dt:
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12/12/2000
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Application #:
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09295362
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Filing Dt:
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04/21/1999
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Title:
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BORDERLESS VIAS WITH CVD BARRIER LAYER
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09302294
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Filing Dt:
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04/30/1999
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Title:
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APPARATUS AND METHOD FOR COUPLING ANALOG SUBSCIBER LINES CONNECTED TO A PRIVATE BRANCH EXCHANGE FOR TRANSMISSION OF NETWORK DATA SIGNALS IN A HOME NETWORK
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09302371
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Filing Dt:
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04/30/1999
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Title:
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APPARATUS AND METHOD OF IMPLEMENTING A HOME NETWORK BY FILTERING ISDN-BASED SIGNALS WITHIN THE CUSTOMER PREMISES
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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09302634
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Filing Dt:
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04/29/1999
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Title:
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INPUT STRUCTURE FOR I/O DEVICE
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09309105
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Filing Dt:
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05/10/1999
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Title:
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MOSFET-TYPE DEVICE WITH HIGHER DRIVER CURRENT AND LOWER STEADY STATE POWER DISSIPATION
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09311448
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Filing Dt:
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05/14/1999
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Title:
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MICROCONTROLLER HAVING A BLOCK OF LOGIC CONFIGURABLE TO PERFORM A SELECTED LOGIC FUNCTION AND TO PRODUCE OUTPUT SIGNALS COUPLED TO CORRESPONDING I/O PADS ACCORDING TO A PREDEFINED HARDWARE INTERFACE
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09315458
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Filing Dt:
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05/20/1999
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Title:
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REDUNDANCY CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09315459
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Filing Dt:
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05/20/1999
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Title:
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LAYEROUT FOR SEMICONDUCTOR MEMORY INCLUDING MULTI-LEVEL SENSING
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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09317156
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Filing Dt:
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05/24/1999
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Title:
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APPARATUS AND METHOD FOR PROGRAMMABLE MEMORY ACCESS SLOT ASSIGNMENT
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Patent #:
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Issue Dt:
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01/02/2001
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Application #:
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09318824
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Filing Dt:
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05/26/1999
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Title:
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FORMATION OF JUNCTIONS BY DIFFUSION FROM A DOPED AMORPHOUS SILICON FILM DURING SILICIDATION
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09320127
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Filing Dt:
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05/25/1999
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Title:
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STAGING BUFFER FOR TRANSLATING CLOCK DOMAINS WHEN SOURCE CLOCK FREQUENCY EXCEEDS TARGET CLOCK FREQUENCY
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09328940
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Filing Dt:
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06/09/1999
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Title:
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GEAR BOX FOR MULTIPLE CLOCK DOMAINS
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09329497
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Filing Dt:
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06/10/1999
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Title:
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APPARATUS AND METHOD FOR SUPERFORWARDING LOAD OPERANDS IN A MICROPROCESSOR
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09334051
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Filing Dt:
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06/15/1999
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Title:
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ZERO-POWER CMOS NON VOLATILE MEMORY CELL HAVING AN AVALANCHE INJECTION ELEMENT
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09334052
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Filing Dt:
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06/15/1999
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Title:
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NON-VOLATILE MEMORY CELL HAVING DUAL AVALANCHE INJECTION ELEMENTS
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09336393
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Filing Dt:
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06/18/1999
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Title:
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FAST CORDIC ALGORITHM WITH SINE GOVERNED TERMINATION
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09336619
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Filing Dt:
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06/18/1999
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Title:
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SUB-LITHOGRAPHIC CONTACTS AND VIAS THROUGH PATTERN, CVD AND ETCH BACK PROCESSING
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09337696
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Filing Dt:
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06/21/1999
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|
Title:
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DEPOSITION OF SUPER THIN PECVD SIO2 IN MULTIPLE DEPOSITION STATION SYSTEM
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