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Reel/Frame:052844/0491   Pages: 31
Recorded: 06/04/2020
Attorney Dkt #:2515.5050
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 250
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
12/07/2004
Application #:
09802443
Filing Dt:
03/09/2001
Publication #:
Pub Dt:
03/14/2002
Title:
FLIP CHIP-IN-LEADFRAME PACKAGE AND PROCESS
2
Patent #:
Issue Dt:
11/09/2004
Application #:
09802664
Filing Dt:
03/09/2001
Publication #:
Pub Dt:
12/27/2001
Title:
A METHOD OF FORMING A FLIP CHIP INTERCONNECTION STRUCTURE
3
Patent #:
Issue Dt:
09/06/2005
Application #:
10080384
Filing Dt:
02/22/2002
Publication #:
Pub Dt:
10/17/2002
Title:
SELF-COPLANARITY BUMPING SHAPE FOR FLIP CHIP
4
Patent #:
Issue Dt:
08/24/2004
Application #:
10081425
Filing Dt:
02/22/2002
Publication #:
Pub Dt:
09/05/2002
Title:
APPARATUS AND PROCESS FOR PRECISE ENCAPSULATION OF FLIP CHIP INTERCONNNECTS
5
Patent #:
Issue Dt:
12/09/2003
Application #:
10081490
Filing Dt:
02/22/2002
Publication #:
Pub Dt:
11/07/2002
Title:
PLASTIC SEMICONDUCTOR PACKAGE
6
Patent #:
Issue Dt:
05/18/2004
Application #:
10081491
Filing Dt:
02/22/2002
Publication #:
Pub Dt:
10/17/2002
Title:
CHIP SCALE PACKAGE WITH FLIP CHIP INTERCONNECT
7
Patent #:
Issue Dt:
04/15/2003
Application #:
10082914
Filing Dt:
02/26/2002
Publication #:
Pub Dt:
09/12/2002
Title:
TAPE BALL GRID ARRAY SEMICONDUCTOR PACKAGE STRUCTURE AND ASSEMBLY PROCESS
8
Patent #:
Issue Dt:
11/22/2005
Application #:
10608843
Filing Dt:
06/27/2003
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD FOR MANUFACTURING PLASTIC BALL GRID ARRAY WITH INTEGRAL HEATSINK
9
Patent #:
Issue Dt:
04/25/2006
Application #:
10618933
Filing Dt:
07/14/2003
Publication #:
Pub Dt:
10/07/2004
Title:
SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING PROCESSOR AND MEMORY PACKAGE ASSEMBLIES
10
Patent #:
Issue Dt:
06/20/2006
Application #:
10632549
Filing Dt:
08/02/2003
Publication #:
Pub Dt:
04/01/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
11
Patent #:
Issue Dt:
12/06/2005
Application #:
10632550
Filing Dt:
08/02/2003
Publication #:
Pub Dt:
03/25/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING STACKED-DIE PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
12
Patent #:
Issue Dt:
01/04/2005
Application #:
10632551
Filing Dt:
08/02/2003
Publication #:
Pub Dt:
04/08/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES AND HAVING ELECTRICAL SHIELD
13
Patent #:
Issue Dt:
05/30/2006
Application #:
10632553
Filing Dt:
08/02/2003
Publication #:
Pub Dt:
04/01/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-DOWN FLIP CHIP BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
14
Patent #:
Issue Dt:
04/17/2007
Application #:
10632568
Filing Dt:
08/02/2003
Publication #:
Pub Dt:
04/01/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
15
Patent #:
Issue Dt:
05/16/2006
Application #:
10681583
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
06/17/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE STACKED OVER DIE-UP FLIP-CHIP BALL GRID ARRAY (BGA) PACKAGE
16
Patent #:
Issue Dt:
05/23/2006
Application #:
10681584
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
06/17/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE AND INCLUDING ADDITIONAL DIE OR STACKED PACKAGE ON SECOND PACKAGE
17
Patent #:
Issue Dt:
05/30/2006
Application #:
10681734
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
06/24/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED BUMP CHIP CARRIER SECOND PACKAGE
18
Patent #:
Issue Dt:
06/14/2005
Application #:
10681747
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
06/17/2004
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE STACKED OVER DIE-UP FLIP-CHIP BALL GRID ARRAY (BGA) PACKAGE
19
Patent #:
Issue Dt:
08/23/2005
Application #:
10681833
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
07/01/2004
Title:
SEMICONDUCTOR STACKED MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE AND ELECTRICALLY SHIELDED FIRST PACKAGE
20
Patent #:
Issue Dt:
04/25/2006
Application #:
10850093
Filing Dt:
05/20/2004
Publication #:
Pub Dt:
10/28/2004
Title:
FLIP CHIP INTERCONNECTION STRUCTURE
21
Patent #:
Issue Dt:
05/06/2008
Application #:
10882078
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
METHOD AND APPARATUS FOR FLIP CHIP ATTACHMENT BY POST COLLAPSE RE-MELT AND RE-SOLIDIFICATION OF BUMPS
22
Patent #:
Issue Dt:
07/11/2006
Application #:
10959713
Filing Dt:
10/06/2004
Publication #:
Pub Dt:
09/08/2005
Title:
DBG SYSTEM AND METHOD WITH ADHESIVE LAYER SEVERING
23
Patent #:
Issue Dt:
08/05/2008
Application #:
10971202
Filing Dt:
10/22/2004
Publication #:
Pub Dt:
10/06/2005
Title:
WIRE BOND CAPILLARY TIP
24
Patent #:
Issue Dt:
12/11/2007
Application #:
10976601
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
09/22/2005
Title:
SEMICONDUCTOR CHIP PACKAGING METHOD WITH INDIVIDUALLY PLACED FILM ADHESIVE PIECES
25
Patent #:
Issue Dt:
01/26/2010
Application #:
10977047
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
10/06/2005
Title:
BONDING TOOL FOR MOUNTING SEMICONDUCTOR CHIPS
26
Patent #:
Issue Dt:
04/25/2006
Application #:
10983898
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
05/12/2005
Title:
FLIP CHIP INTERCONNECTION PAD LAYOUT
27
Patent #:
Issue Dt:
05/06/2008
Application #:
10985654
Filing Dt:
11/10/2004
Publication #:
Pub Dt:
05/26/2005
Title:
BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
28
Patent #:
Issue Dt:
03/03/2015
Application #:
11014257
Filing Dt:
12/16/2004
Publication #:
Pub Dt:
06/23/2005
Title:
Multiple chip package module having inverted package stacked over die
29
Patent #:
Issue Dt:
04/06/2010
Application #:
11027002
Filing Dt:
12/31/2004
Publication #:
Pub Dt:
07/21/2005
Title:
DIE ATTACH BY TEMPERATURE GRADIENT LEAD FREE SOFT SOLDER METAL SHEET OR FILM
30
Patent #:
Issue Dt:
09/05/2006
Application #:
11059274
Filing Dt:
02/16/2005
Publication #:
Pub Dt:
07/07/2005
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE STACKED OVER DIE-UP FLIP-CHIP BALL GRID ARRAY (BGA) PACKAGE
31
Patent #:
Issue Dt:
10/08/2013
Application #:
11134845
Filing Dt:
05/20/2005
Publication #:
Pub Dt:
12/08/2005
Title:
ADHESIVE/SPACER ISLAND STRUCTURE FOR STACKING OVER WIRE BONDED DIE
32
Patent #:
Issue Dt:
05/19/2015
Application #:
11162622
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
08/03/2006
Title:
INTEGRATED, INTEGRATED CIRCUIT SINGULATION SYSTEM
33
Patent #:
Issue Dt:
05/15/2007
Application #:
11213058
Filing Dt:
08/26/2005
Publication #:
Pub Dt:
01/26/2006
Title:
METHOD FOR MANUFACTURING PLASTIC BALL GRID ARRAY PACKAGE WITH INTEGRAL HEATSINK
34
Patent #:
Issue Dt:
04/24/2007
Application #:
11252193
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MULTICHIP LEADFRAME PACKAGE
35
Patent #:
Issue Dt:
08/14/2007
Application #:
11252990
Filing Dt:
10/18/2005
Publication #:
Pub Dt:
05/04/2006
Title:
METHOD FOR REDUCING SEMICONDUCTOR DIE WARPAGE
36
Patent #:
Issue Dt:
11/18/2008
Application #:
11273635
Filing Dt:
11/14/2005
Publication #:
Pub Dt:
06/01/2006
Title:
WIRE BOND INTERCONNECTION
37
Patent #:
Issue Dt:
03/02/2010
Application #:
11274925
Filing Dt:
11/14/2005
Publication #:
Pub Dt:
08/31/2006
Title:
SEMICONDUCTOR PACKAGE HAVING DOUBLE LAYER LEADFRAME
38
Patent #:
Issue Dt:
11/29/2011
Application #:
11280971
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
08/31/2006
Title:
CHIP SCALE PACKAGE HAVING FLIP CHIP INTERCONNECT ON DIE PADDLE
39
Patent #:
Issue Dt:
02/01/2011
Application #:
11282293
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
08/31/2006
Title:
SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER
40
Patent #:
Issue Dt:
04/15/2014
Application #:
11307129
Filing Dt:
01/24/2006
Publication #:
Pub Dt:
07/26/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING WIDE FLANGE LEADFRAME
41
Patent #:
Issue Dt:
08/19/2014
Application #:
11307382
Filing Dt:
02/03/2006
Publication #:
Pub Dt:
08/09/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FACE TO FACE STACK CONFIGURATION
42
Patent #:
Issue Dt:
08/12/2014
Application #:
11307904
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
43
Patent #:
Issue Dt:
10/30/2007
Application #:
11337821
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
06/29/2006
Title:
METHOD FOR MAKING SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE AND INCLUDING ADDITIONAL DIE OR PACKAGE STACKED ON SECOND PACKAGE
44
Patent #:
Issue Dt:
07/24/2007
Application #:
11337944
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
07/20/2006
Title:
METHOD FOR MAKING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED BUMP CHIP CARRIER SECOND PACKAGE
45
Patent #:
Issue Dt:
04/22/2014
Application #:
11354806
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
08/16/2007
Title:
Integrated circuit package system with exposed interconnects
46
Patent #:
Issue Dt:
12/11/2007
Application #:
11355920
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
07/13/2006
Title:
METHOD FOR MAKING A SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING A PROCESSOR AND MEMORY PACKAGE ASSEMBLIES
47
Patent #:
Issue Dt:
01/16/2007
Application #:
11374383
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
08/03/2006
Title:
METHOD OF FABRICATING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE STACKED OVER DIE-UP FLIP-CHIP BALL GRID ARRAY (BGA)
48
Patent #:
Issue Dt:
10/09/2007
Application #:
11374468
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
08/03/2006
Title:
METHOD FOR MAKING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
49
Patent #:
Issue Dt:
03/23/2010
Application #:
11374472
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
08/03/2006
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-DOWN FLIP CHIP BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
50
Patent #:
Issue Dt:
12/02/2014
Application #:
11465744
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WINDOW OPENING
51
Patent #:
Issue Dt:
11/24/2009
Application #:
11521974
Filing Dt:
09/14/2006
Publication #:
Pub Dt:
03/20/2008
Title:
SEMICONDUCTOR ASSEMBLY WITH COMPONENT ATTACHED ON DIE BACK SIDE
52
Patent #:
Issue Dt:
05/11/2010
Application #:
11525493
Filing Dt:
09/22/2006
Publication #:
Pub Dt:
05/29/2008
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD-BUMPS
53
Patent #:
Issue Dt:
01/07/2014
Application #:
11530841
Filing Dt:
09/11/2006
Publication #:
Pub Dt:
01/18/2007
Title:
ADHESIVE/SPACER ISLAND STRUCTURE FOR MULTIPLE DIE PACKAGE
54
Patent #:
Issue Dt:
10/04/2011
Application #:
11536424
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
01/25/2007
Title:
STACKED SEMICONDUCTOR PACKAGE HAVING ADHESIVE/SPACER STRUCTURE AND INSULATION
55
Patent #:
Issue Dt:
05/08/2012
Application #:
11595638
Filing Dt:
11/10/2006
Publication #:
Pub Dt:
05/15/2008
Title:
SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE
56
Patent #:
Issue Dt:
02/14/2012
Application #:
11601103
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHODS FOR MANUFACTURING THERMALLY ENHANCED FLIP-CHIP BALL GRID ARRAYS
57
Patent #:
Issue Dt:
10/27/2009
Application #:
11608164
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/12/2008
Title:
MULTI-LAYER SEMICONDUCTOR PACKAGE
58
Patent #:
Issue Dt:
06/23/2009
Application #:
11619563
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
07/03/2008
Title:
LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY
59
Patent #:
Issue Dt:
11/03/2009
Application #:
11620553
Filing Dt:
01/05/2007
Publication #:
Pub Dt:
07/10/2008
Title:
SEMICONDUCTOR PACKAGE WITH FLOW CONTROLLER
60
Patent #:
Issue Dt:
10/11/2011
Application #:
11620561
Filing Dt:
01/05/2007
Publication #:
Pub Dt:
07/10/2008
Title:
MOLDING COMPOUND FLOW CONTROLLER
61
Patent #:
Issue Dt:
04/01/2008
Application #:
11622993
Filing Dt:
01/12/2007
Publication #:
Pub Dt:
05/17/2007
Title:
METHOD OF FABRICATING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING A SECOND PACKAGE SUBSTRATE WITH AN EXPOSED METAL LAYER WIRE BONDED TO A FIRST PACKAGE SUBSTRATE
62
Patent #:
Issue Dt:
10/18/2011
Application #:
11633701
Filing Dt:
12/04/2006
Publication #:
Pub Dt:
06/05/2008
Title:
PICK-UP HEADS AND SYSTEMS FOR DIE BONDING AND RELATED APPLICATIONS
63
Patent #:
Issue Dt:
04/29/2014
Application #:
11677477
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/23/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BONDING LANDS
64
Patent #:
Issue Dt:
12/29/2009
Application #:
11684265
Filing Dt:
03/09/2007
Publication #:
Pub Dt:
07/05/2007
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
65
Patent #:
Issue Dt:
10/14/2008
Application #:
11686010
Filing Dt:
03/14/2007
Publication #:
Pub Dt:
07/05/2007
Title:
MULTICHIP LEADFRAME PACKAGE
66
Patent #:
Issue Dt:
01/20/2015
Application #:
11689317
Filing Dt:
03/21/2007
Publication #:
Pub Dt:
09/25/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLDED STRIP PROTRUSION
67
Patent #:
Issue Dt:
04/07/2015
Application #:
11694912
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BONDING IN VIA
68
Patent #:
Issue Dt:
10/04/2011
Application #:
11697433
Filing Dt:
04/06/2007
Publication #:
Pub Dt:
08/02/2007
Title:
PLASTIC BALL GRID ARRAY PACKAGE WITH INTEGRAL HEATSINK
69
Patent #:
Issue Dt:
01/20/2015
Application #:
11744062
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
11/06/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DEVICE CAVITY
70
Patent #:
Issue Dt:
06/08/2010
Application #:
11744182
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
02/14/2008
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-UP FLIP CHIP BALL GRID ARRAY PACKAGE AND HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
71
Patent #:
Issue Dt:
10/07/2014
Application #:
11749717
Filing Dt:
05/16/2007
Publication #:
Pub Dt:
11/20/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING RESILIENT MEMBER MOLD SYSTEM TECHNOLOGY
72
Patent #:
Issue Dt:
04/29/2014
Application #:
11758635
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
12/11/2008
Title:
ELECTRONIC SYSTEM WITH VERTICAL INTERMETALLIC COMPOUND
73
Patent #:
Issue Dt:
02/25/2014
Application #:
11762055
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/27/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACK
74
Patent #:
Issue Dt:
02/04/2014
Application #:
11766771
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING PERIMETER PADDLE
75
Patent #:
Issue Dt:
02/17/2015
Application #:
11768790
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG DIE
76
Patent #:
Issue Dt:
03/27/2012
Application #:
11849112
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
12/20/2007
Title:
METHOD OF FABRICATING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BETWEEN STACKED PACKAGES
77
Patent #:
Issue Dt:
02/24/2009
Application #:
11880893
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
01/24/2008
Title:
METHOD FOR MAKING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED WIRE BOND CARRIER SECOND PACKAGE
78
Patent #:
Issue Dt:
02/17/2015
Application #:
11936516
Filing Dt:
11/07/2007
Publication #:
Pub Dt:
05/07/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ARRAY OF EXTERNAL INTERCONNECTS
79
Patent #:
Issue Dt:
09/20/2011
Application #:
11943290
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
06/12/2008
Title:
DIRECT VIA WIRE BONDING AND METHOD OF ASSEMBLING THE SAME
80
Patent #:
Issue Dt:
02/03/2015
Application #:
11951958
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
06/11/2009
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM HOUSING A PLURALITY OF STACKED AND OFFSET INTEGRATED CIRCUITS AND METHOD OF MANUFACTURE THEREFOR
81
Patent #:
Issue Dt:
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Assignor
1
Exec Dt:
05/03/2019
Assignees
1
46429 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
2
5 YISHUN STREET 23
SINGAPORE, SINGAPORE 768442
Correspondence name and address
PATENT LAW GROUP: ATKINS AND ASSOCIATES
123 W. CHANDLER HEIGHTS ROAD, #12535
CHANDLER, AZ 85248

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