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Total properties:
14
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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10150685
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Filing Dt:
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05/17/2002
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Publication #:
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Pub Dt:
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11/20/2003
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Title:
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DISTRIBUTED RAM IN A LOGIC ARRAY
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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10164455
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Filing Dt:
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06/06/2002
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Publication #:
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Pub Dt:
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12/12/2002
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Title:
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CELL ARCHITECTURE TO REDUCE CUSTOMIZATION IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10234926
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Filing Dt:
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09/04/2002
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Publication #:
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Pub Dt:
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12/25/2003
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Title:
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LOGIC ARRAY DEVICES HAVING COMPLEX MACRO-CELL ARCHITECTURE AND METHODS FACILITATING USE OF SAME
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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10904411
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Filing Dt:
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11/09/2004
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Title:
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CUSTOMIZATION OF STRUCTURED ASIC DEVICES USING PRE-PROCESS EXTRACTION OF ROUTING INFORMATION
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Patent #:
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Issue Dt:
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02/26/2008
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Application #:
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10906527
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Filing Dt:
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02/23/2005
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Publication #:
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Pub Dt:
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09/01/2005
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Title:
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CONFIGURABLE INTEGRATED CIRCUIT CAPACITOR ARRAY USING VIA MASK LAYERS
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Patent #:
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Issue Dt:
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11/11/2008
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Application #:
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10907456
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Filing Dt:
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04/01/2005
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Publication #:
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Pub Dt:
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10/13/2005
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Title:
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VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11023860
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Filing Dt:
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12/28/2004
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Publication #:
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Pub Dt:
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06/02/2005
| | | | |
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Title:
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LOGIC ARRAY DEVICES HAVING COMPLEX MACRO-CELL ARCHITECTURE AND METHODS FACILITATING USE OF SAME
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Patent #:
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Issue Dt:
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09/29/2009
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Application #:
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11089192
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Filing Dt:
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03/24/2005
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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NOVEL PEPTIDES AS NS3-SERINE PROTEASE INHIBITORS OF HEPATITIS C VIRUS
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11469189
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Filing Dt:
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08/31/2006
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Publication #:
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Pub Dt:
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03/06/2008
| | | | |
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Title:
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CREATING HIGH-DRIVE LOGIC DEVICES FROM STANDARD GATES WITH MINIMAL USE OF CUSTOM MASKS
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11782616
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Filing Dt:
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07/24/2007
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Publication #:
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Pub Dt:
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11/15/2007
| | | | |
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Title:
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LOGIC ARRAY DEVICES HAVING COMPLEX MACRO-CELL ARCHITECTURE AND METHODS FACILITATING USE OF SAME
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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11850791
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Filing Dt:
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09/06/2007
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Publication #:
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Pub Dt:
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03/12/2009
| | | | |
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Title:
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CONFIGURING STRUCTURED ASIC FABRIC USING TWO NON-ADJACENT VIA LAYERS
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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12246802
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Filing Dt:
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10/07/2008
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
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Title:
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VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE
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|
|
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Patent #:
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Issue Dt:
|
07/05/2011
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Application #:
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12268919
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Filing Dt:
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11/11/2008
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Publication #:
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Pub Dt:
|
03/05/2009
| | | | |
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Title:
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VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE
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|
|
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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12432494
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Filing Dt:
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04/29/2009
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Publication #:
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Pub Dt:
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08/20/2009
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Title:
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USING SELECTABLE IN-LINE INVERTERS TO REDUCE THE NUMBER OF INVERTERS IN A SEMICONDUCTOR DESIGN
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