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Total properties:
12
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09648077
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Filing Dt:
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08/25/2000
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Title:
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METHOD OF FORMING ONO FLASH MEMORY DEVICES USING RAPID THERMAL OXIDATION
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09648361
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Filing Dt:
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08/25/2000
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Title:
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METHOD OF FORMING ONO FLASH MEMORY DEVICES USING LOW ENERGY NITROGEN IMPLANTATION
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09822995
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Filing Dt:
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03/30/2001
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Title:
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I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09829193
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Filing Dt:
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04/09/2001
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Publication #:
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Pub Dt:
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01/30/2003
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Title:
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SOFT PROGRAM AND SOFT PROGRAM VERIFY OF THE CORE CELLS IN FLASH MEMORY ARRAY
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09873927
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Filing Dt:
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06/04/2001
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Title:
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METHODS AND APPARATUS FOR READING A CAM CELL USING BOOSTED AND REGULATED GATE VOLTAGE
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09884583
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Filing Dt:
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06/19/2001
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Title:
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Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09915018
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Filing Dt:
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07/25/2001
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Publication #:
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Pub Dt:
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01/30/2003
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Title:
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VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09928059
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Filing Dt:
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08/10/2001
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Title:
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DECODER APPARATUS AND METHODS FOR PRE-CHARGING BIT LINES
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09998624
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Filing Dt:
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11/30/2001
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Title:
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DIE SEAL FOR SEMICONDUCTOR DEVICE MOISTURE PROTECTION
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09999869
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Filing Dt:
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10/23/2001
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Title:
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DRAIN SIDE SENSING SCHEME FOR VIRTUAL GROUND FLASH EPROM ARRAY WITH ADJACENT BIT CHARGE AND HOLD
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10045354
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Filing Dt:
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11/07/2001
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Title:
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INNOVATIVE METHOD OF HARD MASK REMOVAL
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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10126326
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Filing Dt:
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04/19/2002
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Title:
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RELACS SHRINK METHOD APPLIED FOR SINGLE PRINT RESIST MASK FOR LDD OR BURIED BITLINE IMPLANTS USING CHEMICALLY AMPLIFIED DUV TYPE PHOTORESIST
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