Patent Assignment Details
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Reel/Frame: | 013292/0504 | |
| Pages: | 3 |
| | Recorded: | 11/29/2002 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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10007405
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Filing Dt:
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12/04/2001
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Title:
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PROCESS FOR TREATING POROUS LOW K DIELECTRIC MATERIAL IN DAMASCENE STRUCTURE TO FORM A NON-POROUS DIELECTRIC DIFFUSION BARRIER LAYER ON ETCHED VIA AND TRENCH SURFACES IN THE POROUS LOW K DIELECTRIC MATERIAL
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Assignee
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1551 MCCARTHY BOULEVARD |
MILPITAS, CALIFORNIA 95035 |
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Correspondence name and address
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LSI LOGIC CORPORATION
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SANDEEP JAGGI
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1551 MCCARTHY BOULEVARD, M/S D-106
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MILPITAS, CA 95035
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