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Total properties:
10
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|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2008
|
Application #:
|
11119029
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Filing Dt:
|
04/29/2005
|
|
Title:
|
TARGETS FOR MEASUREMENTS IN SEMICONDUCTOR DEVICES
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|
|
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Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11234535
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Filing Dt:
|
09/23/2005
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|
Publication #:
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|
Pub Dt:
|
03/29/2007
| | | | |
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Title:
|
Methods of forming copper interconnect structures on semiconductor substrates
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11266024
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Filing Dt:
|
11/03/2005
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|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
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Title:
|
METHODS OF FABRICATING INTEGRATED CIRCUIT TRANSISTORS BY SIMULTANEOUSLY REMOVING A PHOTORESIST LAYER AND A CARBON-CONTAINING LAYER ON DIFFERENT ACTIVE AREAS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2009
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Application #:
|
11267980
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Filing Dt:
|
11/07/2005
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|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
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Title:
|
METHODS OF FABRICATING INTEGRATED CIRCUIT DEVICES USING ANTI-REFLECTIVE COATING AS IMPLANT BLOCKING LAYER
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11345422
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Filing Dt:
|
02/01/2006
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|
Publication #:
|
|
Pub Dt:
|
08/02/2007
| | | | |
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Title:
|
Electronic subsystem assembly including radio frequency interface
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|
|
|
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Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
11354985
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Filing Dt:
|
02/16/2006
|
|
Publication #:
|
|
Pub Dt:
|
08/16/2007
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR AN OSCILLATOR WITHIN A MEMORY DEVICE
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11390982
|
Filing Dt:
|
03/27/2006
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|
Publication #:
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|
Pub Dt:
|
09/27/2007
| | | | |
|
Title:
|
System and method for semiconductor device fabrication using modeling
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11397429
|
Filing Dt:
|
04/04/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
|
Title:
|
METHODS OF DDR RECEIVER READ RE-SYNCHRONIZATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11402764
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Filing Dt:
|
04/12/2006
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|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
|
Title:
|
CONTROL SYSTEMS AND METHODS ASSOCIATED THEREWITH
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11403483
|
Filing Dt:
|
04/13/2006
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
|
Title:
|
RETICLE STAGES FOR LITHOGRAPHY SYSTEMS AND LITHOGRAPHY METHODS
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|
