skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036877/0513   Pages: 13
Recorded: 10/16/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 201
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
04/02/2002
Application #:
09559776
Filing Dt:
04/27/2000
Title:
Semiconductor device and method of increasing channel length to eliminate short channel effects of corner devices
2
Patent #:
Issue Dt:
11/30/2004
Application #:
10411728
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/14/2004
Title:
SCANNING TIP ORIENTATION ADJUSTMENT METHOD FOR ATOMIC FORCE MICROSCOPY
3
Patent #:
Issue Dt:
10/26/2004
Application #:
10424039
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
11/27/2003
Title:
APPARATUS FOR PATTERNING A SEMICONDUCTOR WAFER
4
Patent #:
Issue Dt:
03/28/2006
Application #:
10425995
Filing Dt:
04/30/2003
Publication #:
Pub Dt:
11/04/2004
Title:
CONTINUOUS TEST FLOW METHOD AND APPARATUS
5
Patent #:
Issue Dt:
04/07/2009
Application #:
10566454
Filing Dt:
08/07/2006
Publication #:
Pub Dt:
10/25/2007
Title:
METHOD FOR APPLYING REWIRING TO A PANEL WHILE COMPENSATING FOR POSITION ERRORS OF SEMICONDUCTOR CHIPS IN COMPONENT POSITIONS OF THE PANEL
6
Patent #:
Issue Dt:
09/02/2008
Application #:
10569859
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
07/05/2007
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING A SEMICONDUCTOR MEMORY DEVICE
7
Patent #:
Issue Dt:
09/30/2008
Application #:
10574236
Filing Dt:
01/18/2007
Publication #:
Pub Dt:
05/24/2007
Title:
CLOCK RECEIVER CIRCUIT DEVICE, IN PARTICULAR FOR SEMI-CONDUCTOR COMPONENTS
8
Patent #:
Issue Dt:
12/06/2011
Application #:
10577173
Filing Dt:
10/27/2009
Publication #:
Pub Dt:
02/11/2010
Title:
SEMICONDUCTOR DEVICE WITH PLASTIC PACKAGE MOLDING COMPOUND, SEMICONDUCTOR CHIP AND LEADFRAME AND METHOD FOR PRODUCING THE SAME
9
Patent #:
Issue Dt:
06/21/2011
Application #:
10585151
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
08/14/2008
Title:
VOLTAGE REGULATION SYSTEM
10
Patent #:
Issue Dt:
08/26/2008
Application #:
10599428
Filing Dt:
11/06/2006
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD FOR DETERMINING A RADIATION POWER AND AN EXPOSURE APPARATUS
11
Patent #:
Issue Dt:
03/08/2005
Application #:
10615630
Filing Dt:
07/09/2003
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD OF FORMING SHALLOW TRENCH ISOLATION USING DEEP TRENCH ISOLATION
12
Patent #:
Issue Dt:
08/30/2005
Application #:
10620989
Filing Dt:
07/16/2003
Publication #:
Pub Dt:
01/20/2005
Title:
METHODS AND APPARATUS FOR ACTIVE TERMINATION OF HIGH-FREQUENCY SIGNALS
13
Patent #:
Issue Dt:
01/04/2005
Application #:
10623461
Filing Dt:
07/18/2003
Publication #:
Pub Dt:
01/20/2005
Title:
MULTI-LAYER BARRIER ALLOWING RECOVERY ANNEAL FOR FERROELECTRIC CAPACITORS
14
Patent #:
Issue Dt:
09/05/2006
Application #:
10625483
Filing Dt:
07/22/2003
Publication #:
Pub Dt:
01/27/2005
Title:
FORMATION OF A CONTACT IN A DEVICE, AND THE DEVICE INCLUDING THE CONTACT
15
Patent #:
Issue Dt:
03/15/2005
Application #:
10629326
Filing Dt:
07/28/2003
Publication #:
Pub Dt:
02/03/2005
Title:
FABRICATION OF A FERAM CAPACITOR USING A NOBLE METAL HARDMASK
16
Patent #:
Issue Dt:
10/25/2005
Application #:
10631394
Filing Dt:
07/31/2003
Publication #:
Pub Dt:
02/03/2005
Title:
OFF CHIP DRIVER
17
Patent #:
Issue Dt:
02/14/2006
Application #:
10636369
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/10/2005
Title:
MEMORY CELL SIGNAL WINDOW TESTING APPARATUS
18
Patent #:
Issue Dt:
09/26/2006
Application #:
10641812
Filing Dt:
08/15/2003
Publication #:
Pub Dt:
02/17/2005
Title:
REDUCED POWER CONSUMPTION IN INTEGRATED CIRCUITS WITH FUSE CONTROLLED REDUNDANT CIRCUITS
19
Patent #:
Issue Dt:
10/18/2005
Application #:
10651281
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
03/03/2005
Title:
REFERENCE VOLTAGE DETECTOR FOR POWER-ON SEQUENCE IN A MEMORY
20
Patent #:
Issue Dt:
09/05/2006
Application #:
10651753
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
RELIABLE FERRO FUSE CELL
21
Patent #:
Issue Dt:
11/07/2006
Application #:
10661295
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/17/2005
Title:
AUTOMATED LAYOUT TRANSFORMATION SYSTEM AND METHOD
22
Patent #:
Issue Dt:
06/21/2005
Application #:
10672118
Filing Dt:
09/26/2003
Publication #:
Pub Dt:
03/31/2005
Title:
RANDOM ACCESS MEMORY HAVING DRIVER FOR REDUCED LEAKAGE CURRENT
23
Patent #:
Issue Dt:
01/10/2006
Application #:
10672120
Filing Dt:
09/26/2003
Publication #:
Pub Dt:
04/14/2005
Title:
MEMORY DEVICE HAVING MULTIPLE ARRAY STRUCTURE FOR INCREASED BANDWIDTH
24
Patent #:
Issue Dt:
03/01/2005
Application #:
10672244
Filing Dt:
09/25/2003
Title:
MEMORY SYSTEM WITH REDUCED REFRESH CURRENT
25
Patent #:
Issue Dt:
08/23/2005
Application #:
10672246
Filing Dt:
09/25/2003
Publication #:
Pub Dt:
03/31/2005
Title:
TEMPERATURE SENSOR SCHEME
26
Patent #:
Issue Dt:
02/21/2006
Application #:
10672306
Filing Dt:
09/26/2003
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD FOR PRODUCING A FERROELECTRIC CAPACITOR THAT INCLUDES ETCHING WITH HARDMASKS
27
Patent #:
Issue Dt:
04/18/2006
Application #:
10674177
Filing Dt:
09/29/2003
Publication #:
Pub Dt:
03/31/2005
Title:
RANDOM ACCESS MEMORY WITH POST-AMBLE DATA STROBE SIGNAL NOISE REJECTION
28
Patent #:
Issue Dt:
12/13/2005
Application #:
10674386
Filing Dt:
10/01/2003
Publication #:
Pub Dt:
04/07/2005
Title:
SYSTEM AND METHOD FOR AUTOMATICALLY-DETECTING SOFT ERRORS IN LATCHES OF AN INTEGRATED CIRCUIT
29
Patent #:
Issue Dt:
02/07/2006
Application #:
10675549
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
ECHO CLOCK ON MEMORY SYSTEM HAVING WAIT INFORMATION
30
Patent #:
Issue Dt:
08/02/2005
Application #:
10676360
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
DEVICE AND A METHOD FOR FORMING A FERROELECTRIC CAPACITOR DEVICE
31
Patent #:
Issue Dt:
05/09/2006
Application #:
10677099
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
DEVICE AND A METHOD FOR FORMING A CAPACITOR DEVICE
32
Patent #:
Issue Dt:
06/13/2006
Application #:
10677852
Filing Dt:
10/01/2003
Publication #:
Pub Dt:
04/21/2005
Title:
SELF-ALIGNED VO-CONTACT FOR CELL SIZE REDUCTION
33
Patent #:
Issue Dt:
08/23/2005
Application #:
10683768
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/14/2005
Title:
METHOD AND CIRCUIT CONFIGURATION FOR DIGITIZING A SIGNAL IN AN INPUT BUFFER OF A DRAM DEVICE
34
Patent #:
Issue Dt:
12/06/2005
Application #:
10683965
Filing Dt:
10/10/2003
Publication #:
Pub Dt:
04/14/2005
Title:
REFERENCE CURRENT DISTRIBUTION IN MRAM DEVICES
35
Patent #:
Issue Dt:
04/18/2006
Application #:
10685004
Filing Dt:
10/15/2003
Publication #:
Pub Dt:
04/21/2005
Title:
MASK AND METHOD FOR USING THE MASK IN LITHOGRAPHIC PROCESSING
36
Patent #:
Issue Dt:
01/25/2005
Application #:
10692119
Filing Dt:
10/23/2003
Title:
METHOD AND CIRCUIT CONFIGURATION FOR MULTIPLE CHARGE RECYCLING DURING REFRESH OPERATIONS IN A DRAM DEVICE
37
Patent #:
Issue Dt:
10/25/2005
Application #:
10695394
Filing Dt:
10/29/2003
Publication #:
Pub Dt:
05/05/2005
Title:
ACOUSTIC DETECTION OF MECHANICALLY INDUCED CIRCUIT DAMAGE
38
Patent #:
Issue Dt:
02/21/2006
Application #:
10697639
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
05/05/2005
Title:
METHOD OF CALCULATING A PRESSURE COMPENSATION RECIPE FOR A SEMICONDUCTOR WAFER IMPLANTER
39
Patent #:
Issue Dt:
03/07/2006
Application #:
10697644
Filing Dt:
10/31/2003
Publication #:
Pub Dt:
05/05/2005
Title:
UTILIZATION OF AN ION GAUGE IN THE PROCESS CHAMBER OF A SEMICONDUCTOR ION IMPLANTER
40
Patent #:
Issue Dt:
01/10/2006
Application #:
10702074
Filing Dt:
11/03/2003
Publication #:
Pub Dt:
05/05/2005
Title:
DEVICE AND METHOD FOR INHIBITING OXIDATION OF CONTACT PLUGS IN FERROELECTRIC CAPACITOR DEVICES
41
Patent #:
Issue Dt:
10/10/2006
Application #:
10703870
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
05/12/2005
Title:
FERROELECTRIC CAPACITOR DEVICES AND A METHOD FOR COMPENSATING FOR DAMAGE TO A CAPACITOR CAUSED BY ETCHING
42
Patent #:
Issue Dt:
08/22/2006
Application #:
10704091
Filing Dt:
11/07/2003
Publication #:
Pub Dt:
05/12/2005
Title:
REFRESH FOR DYNAMIC CELLS WITH WEAK RETENTION
43
Patent #:
Issue Dt:
01/04/2005
Application #:
10706146
Filing Dt:
11/12/2003
Title:
LATCH SCHEME WITH INVALID COMMAND DETECTOR
44
Patent #:
Issue Dt:
02/21/2006
Application #:
10713239
Filing Dt:
11/13/2003
Publication #:
Pub Dt:
05/19/2005
Title:
FERROELECTRIC CAPACITOR DEVICES AND FERAM DEVICES
45
Patent #:
Issue Dt:
03/18/2008
Application #:
10715812
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
05/19/2005
Title:
METHOD AND CIRCUIT CONFIGURATION FOR REFRESHING DATA IN A SEMICONDUCTOR MEMORY
46
Patent #:
Issue Dt:
03/06/2007
Application #:
10716079
Filing Dt:
11/18/2003
Publication #:
Pub Dt:
05/19/2005
Title:
LOW RISE/FALL SKEWED INPUT BUFFER COMPENSATING PROCESS VARIATION
47
Patent #:
Issue Dt:
09/04/2007
Application #:
10716749
Filing Dt:
11/19/2003
Publication #:
Pub Dt:
05/19/2005
Title:
INTERNAL VOLTAGE GENERATOR WITH TEMPERATURE CONTROL
48
Patent #:
Issue Dt:
03/07/2006
Application #:
10716762
Filing Dt:
11/19/2003
Publication #:
Pub Dt:
05/19/2005
Title:
BACK-BIAS VOLTAGE GENERATOR WITH TEMPERATURE CONTROL
49
Patent #:
Issue Dt:
05/03/2005
Application #:
10723211
Filing Dt:
11/26/2003
Publication #:
Pub Dt:
05/26/2005
Title:
DUAL POWER SENSING SCHEME FOR A MEMORY DEVICE
50
Patent #:
Issue Dt:
03/28/2006
Application #:
10727106
Filing Dt:
12/03/2003
Publication #:
Pub Dt:
06/09/2005
Title:
METHODS AND APPARATUS FOR ACTIVE TERMINATION OF HIGH-FREQUENCY SIGNALS
51
Patent #:
Issue Dt:
10/18/2005
Application #:
10727406
Filing Dt:
12/04/2003
Publication #:
Pub Dt:
06/09/2005
Title:
RANDOM ACCESS MEMORY WITH OPTIONAL INACCESSIBLE MEMORY CELLS
52
Patent #:
Issue Dt:
09/27/2005
Application #:
10734439
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
06/16/2005
Title:
IMPRINT SUPPRESSION CIRCUIT SCHEME
53
Patent #:
Issue Dt:
11/15/2005
Application #:
10738349
Filing Dt:
12/16/2003
Publication #:
Pub Dt:
06/16/2005
Title:
RANDOM ACCESS MEMORY USING PRECHARGE TIMERS IN TEST MODE
54
Patent #:
Issue Dt:
05/09/2006
Application #:
10739071
Filing Dt:
12/19/2003
Publication #:
Pub Dt:
06/23/2005
Title:
METHOD AND APPARATUS FOR CONTROLLING REFRESH CYCLES OF A PLURAL CYCLE REFRESH SCHEME IN A DYNAMIC MEMORY
55
Patent #:
Issue Dt:
06/20/2006
Application #:
10739097
Filing Dt:
12/19/2003
Publication #:
Pub Dt:
06/23/2005
Title:
INPUT BUFFER CIRCUIT INCLUDING REFERENCE VOLTAGE MONITORING CIRCUIT
56
Patent #:
Issue Dt:
10/17/2006
Application #:
10739398
Filing Dt:
12/19/2003
Publication #:
Pub Dt:
06/23/2005
Title:
OSCILLATOR WITH TEMPERATURE CONTROL
57
Patent #:
Issue Dt:
05/10/2005
Application #:
10744804
Filing Dt:
12/23/2003
Title:
INPUT BUFFER WITH DIFFERENTIAL AMPLIFIER
58
Patent #:
Issue Dt:
11/18/2008
Application #:
10744807
Filing Dt:
12/23/2003
Publication #:
Pub Dt:
06/23/2005
Title:
TEMPERATURE COMPENSATED DELAY SIGNALS
59
Patent #:
Issue Dt:
09/19/2006
Application #:
10747277
Filing Dt:
12/30/2003
Publication #:
Pub Dt:
06/30/2005
Title:
BURST MODE IMPLEMENTATION IN A MEMORY DEVICE
60
Patent #:
Issue Dt:
02/22/2005
Application #:
10757275
Filing Dt:
01/14/2004
Title:
MEMORY WITH AUTO REFRESH TO DESIGNATED BANKS
61
Patent #:
Issue Dt:
05/09/2006
Application #:
10766428
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
07/28/2005
Title:
MEMORY DEVICE WITH NON-VARIABLE WRITE LATENCY
62
Patent #:
Issue Dt:
01/30/2007
Application #:
10767928
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
METHOD FOR FORMATION OF AN ULTRA-THIN FILM AND SEMICONDUCTOR DEVICE CONTAINING SUCH A FILM
63
Patent #:
Issue Dt:
09/20/2005
Application #:
10780884
Filing Dt:
02/19/2004
Publication #:
Pub Dt:
08/25/2005
Title:
METHOD OF DETERMINING THE OVERLAY ACCURACY OF MULTIPLE PATTERNS FORMED ON A SEMICONDUCTOR WAFER
64
Patent #:
Issue Dt:
10/09/2007
Application #:
10798332
Filing Dt:
03/12/2004
Publication #:
Pub Dt:
09/15/2005
Title:
METHOD AND ARRANGEMENT FOR CONTROLLING FOCUS PARAMETERS OF AN EXPOSURE TOOL
65
Patent #:
Issue Dt:
01/03/2006
Application #:
10805024
Filing Dt:
03/18/2004
Publication #:
Pub Dt:
09/22/2005
Title:
MEMORY DEVICE WITH COMMON ROW INTERFACE
66
Patent #:
Issue Dt:
10/03/2006
Application #:
10826603
Filing Dt:
04/16/2004
Publication #:
Pub Dt:
12/09/2004
Title:
METHOD FOR PROTECTING THE REDISTRIBUTION LAYER ON WAFERS/CHIPS
67
Patent #:
Issue Dt:
08/16/2005
Application #:
10834382
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
12/09/2004
Title:
VOLTAGE LEVEL CONVERTER DEVICE
68
Patent #:
Issue Dt:
08/08/2006
Application #:
10835217
Filing Dt:
04/29/2004
Publication #:
Pub Dt:
11/11/2004
Title:
METHOD FOR DETECTING AND COMPENSATING FOR POSITIONAL DISPLACEMENTS IN PHOTOLITHOGRAPHIC MASK UNITS AND APPARATUS FOR CARRYING OUT THE METHOD
69
Patent #:
Issue Dt:
11/29/2005
Application #:
10850185
Filing Dt:
05/20/2004
Publication #:
Pub Dt:
01/13/2005
Title:
DRAM MEMORY CIRCUIT WITH SENSE AMPLIFIERS
70
Patent #:
Issue Dt:
02/20/2007
Application #:
10850832
Filing Dt:
05/21/2004
Publication #:
Pub Dt:
01/27/2005
Title:
ARRANGEMENT FOR REDUCING STRESS IN SUBSTRATE-BASED CHIP PACKAGES
71
Patent #:
Issue Dt:
03/21/2006
Application #:
10856414
Filing Dt:
05/27/2004
Publication #:
Pub Dt:
01/06/2005
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY HAVING CHARGE TRAPPING MEMORY CELLS AND SEMICONDUCTOR SUBSTRATE
72
Patent #:
Issue Dt:
10/30/2007
Application #:
10857637
Filing Dt:
05/27/2004
Publication #:
Pub Dt:
01/13/2005
Title:
SEMICONDUCTOR MEMORY WITH VIRTUAL GROUND ARCHITECTURE
73
Patent #:
Issue Dt:
09/27/2005
Application #:
10859459
Filing Dt:
06/02/2004
Publication #:
Pub Dt:
01/13/2005
Title:
SUBSTRATE-BASED CHIP PACKAGE
74
Patent #:
Issue Dt:
11/07/2006
Application #:
10863237
Filing Dt:
06/09/2004
Publication #:
Pub Dt:
02/24/2005
Title:
METHOD AND APPARATUS FOR POSITIONING A TEST HEAD ON A PRINTED CIRCUIT BOARD
75
Patent #:
Issue Dt:
09/26/2006
Application #:
10864321
Filing Dt:
06/10/2004
Publication #:
Pub Dt:
02/17/2005
Title:
METHOD AND STRUCTURE OF AN AUXILIARY TRANSISTOR ARRANGEMENT USED FOR FABRICATING A SEMICONDUCTOR MEMORY DEVICE
76
Patent #:
Issue Dt:
04/18/2006
Application #:
10868516
Filing Dt:
06/15/2004
Publication #:
Pub Dt:
12/23/2004
Title:
SUBSTRATE-BASED IC PACKAGE
77
Patent #:
Issue Dt:
11/06/2007
Application #:
10872427
Filing Dt:
06/22/2004
Publication #:
Pub Dt:
02/24/2005
Title:
MEMORY SYSTEM AND METHOD FOR TRANSFERRING DATA THEREIN
78
Patent #:
Issue Dt:
09/04/2007
Application #:
10874761
Filing Dt:
06/24/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMI-CONDUCTOR COMPONENT TEST PROCESS AND A SYSTEM FOR TESTING SEMI-CONDUCTOR COMPONENTS
79
Patent #:
Issue Dt:
09/25/2007
Application #:
10875788
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
02/24/2005
Title:
SYSTEM AND METHOD FOR DETERMINING THE TEMPERATURE OF A SEMICONDUCTOR WAFER
80
Patent #:
Issue Dt:
03/13/2007
Application #:
10877139
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
HUB CHIP FOR ONE OR MORE MEMORY MODULES
81
Patent #:
Issue Dt:
08/28/2007
Application #:
10877262
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
01/27/2005
Title:
NONINVASIVE METHOD FOR CHARACTERIZING AND IDENTIFYING EMBEDDED MICROPATTERNS
82
Patent #:
Issue Dt:
04/01/2008
Application #:
10877657
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
02/10/2005
Title:
INTEGRATED CIRCUIT HAVING A PLURALITY OF OUTPUT DRIVERS
83
Patent #:
Issue Dt:
06/13/2006
Application #:
10878681
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
02/03/2005
Title:
APPARATUS AND METHOD FOR CALIBRATING A SEMICONDUCTOR TEST SYSTEM
84
Patent #:
Issue Dt:
05/27/2008
Application #:
10879467
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
12/30/2004
Title:
METHOD FOR WIRELESS DATA INTERCHANGE BETWEEN CIRCUIT UNITS WITHIN A PACKAGE, AND CIRCUIT ARRANGEMENT FOR PERFORMING THE METHOD
85
Patent #:
Issue Dt:
01/02/2007
Application #:
10882752
Filing Dt:
07/01/2004
Publication #:
Pub Dt:
01/05/2006
Title:
VOID FREE, SILICON FILLED TRENCHES IN SEMICONDUCTORS
86
Patent #:
Issue Dt:
11/24/2009
Application #:
10884110
Filing Dt:
07/02/2004
Publication #:
Pub Dt:
02/10/2005
Title:
ADAPTER CARD FOR CONNECTION TO A DATA BUS IN A DATA PROCESSING UNIT AND METHOD FOR OPERATING A DDR MEMORY MODULE
87
Patent #:
Issue Dt:
06/13/2006
Application #:
10886814
Filing Dt:
07/08/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMICONDUCTOR MEMORY MODULE
88
Patent #:
Issue Dt:
06/10/2008
Application #:
10887019
Filing Dt:
07/08/2004
Publication #:
Pub Dt:
02/24/2005
Title:
SEMICONDUCTOR MEMORY MODULE
89
Patent #:
Issue Dt:
12/05/2006
Application #:
10887949
Filing Dt:
07/09/2004
Publication #:
Pub Dt:
02/10/2005
Title:
OUTPUT DRIVER FOR AN INTEGRATED CIRCUIT AND METHOD FOR DRIVING AN OUTPUT DRIVER
90
Patent #:
Issue Dt:
05/02/2006
Application #:
10888649
Filing Dt:
07/09/2004
Publication #:
Pub Dt:
02/10/2005
Title:
APPARATUS AND METHOD FOR READING OUT DEFECT INFORMATION ITEMS FROM AN INTEGRATED CHIP
91
Patent #:
Issue Dt:
09/05/2006
Application #:
10889370
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
03/17/2005
Title:
METHOD AND APPARATUS FOR PRODUCING A REFERENCE VOLTAGE
92
Patent #:
Issue Dt:
06/06/2006
Application #:
10889670
Filing Dt:
07/13/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD FOR FABRICATING A TRENCH CAPACITOR WITH AN INSULATION COLLAR WHICH IS ELECTRICALLY CONNECTED TO A SUBSTRATE ON ONE SIDE VIA A BURIED CONTACT, IN PARTICULAR FOR A SEMICONDUCTOR MEMORY CELL
93
Patent #:
Issue Dt:
03/06/2007
Application #:
10889923
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
01/13/2005
Title:
A CIRCUIT AND METHOD FOR TESTING A CIRCUIT HAVING MEMORY ARRAY AND ADDRESSING AND CONTROL UNIT
94
Patent #:
Issue Dt:
07/11/2006
Application #:
10890803
Filing Dt:
07/14/2004
Publication #:
Pub Dt:
03/03/2005
Title:
SEMICONDUCTOR MEMORY HAVING CHARGE TRAPPING MEMORY CELLS
95
Patent #:
Issue Dt:
05/29/2007
Application #:
10890934
Filing Dt:
07/14/2004
Publication #:
Pub Dt:
02/17/2005
Title:
SEMICONDUCTOR MEMORY MODULE
96
Patent #:
Issue Dt:
01/08/2008
Application #:
10892546
Filing Dt:
07/16/2004
Publication #:
Pub Dt:
03/10/2005
Title:
SEMI-CONDUCTOR MEMORY COMPONENT, AND A PROCESS FOR OPERATING A SEMI-CONDUCTOR MEMORY COMPONENT
97
Patent #:
Issue Dt:
08/08/2006
Application #:
10894348
Filing Dt:
07/19/2004
Publication #:
Pub Dt:
03/03/2005
Title:
CHARGE TRAPPING MEMORY CELL
98
Patent #:
Issue Dt:
09/09/2008
Application #:
10894640
Filing Dt:
07/20/2004
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD FOR CHECKING PERIODIC STRUCTURES ON LITHOGRAPHY MASKS
99
Patent #:
Issue Dt:
07/25/2006
Application #:
10897403
Filing Dt:
07/23/2004
Publication #:
Pub Dt:
04/21/2005
Title:
METHOD FOR FABRICATING A GATE STRUCTURE OF A FET AND GATE STRUCTURE OF A FET
100
Patent #:
Issue Dt:
07/15/2008
Application #:
10899318
Filing Dt:
07/26/2004
Publication #:
Pub Dt:
02/17/2005
Title:
APPARATUS FOR MEASURING AN EXPOSURE INTENSITY ON A WAFER
Assignor
1
Exec Dt:
07/08/2015
Assignee
1
29 EARLSFORT TERRACE, DUBLIN 2
DUBLIN, IRELAND
Correspondence name and address
POLARIS INNOVATIONS LIMITED
303 TERRY FOX DRIVE, SUITE 300
OTTAWA, K2K 3J1 CANADA

Search Results as of: 06/21/2025 11:52 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT