|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13401847
|
Filing Dt:
|
02/22/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
SYSTEM FOR TESTING ELECTRONIC CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2016
|
Application #:
|
13402413
|
Filing Dt:
|
02/22/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
Embedded Electrical Component Surface Interconnect
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13402426
|
Filing Dt:
|
02/22/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
NON-VOLATILE MEMORY CELL AND LOGIC TRANSISTOR INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
13402844
|
Filing Dt:
|
02/22/2012
|
Title:
|
SINGLE PERIOD PHASE TO DIGITAL CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13403458
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
METHOD FOR FORMING DIE ASSEMBLY WITH HEAT SPREADER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2013
|
Application #:
|
13403597
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
RECOVERABLE AND RECONFIGURABLE PIPELINE STRUCTURE FOR STATE-RETENTION POWER GATING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
13403743
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
METAL-INSULATOR-METAL CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
13403945
|
Filing Dt:
|
02/23/2012
|
Title:
|
SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13403964
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
INTER-PARTITION COMMUNICATION IN MULTI-CORE PROCESSOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13403969
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
DATA PROCESSOR WITH ASYNCHRONOUS RESET
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13404945
|
Filing Dt:
|
02/24/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
EMBEDDED ELECTRONIC COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
13405965
|
Filing Dt:
|
02/27/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
HIERARCHICAL ERROR CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
13406439
|
Filing Dt:
|
02/27/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
COMBINED ENVIRONMENTAL PARAMETER SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13410267
|
Filing Dt:
|
03/01/2012
|
Title:
|
VOLTAGE CLAMPING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13412680
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
BIPOLAR PRIMARY SENSE AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2016
|
Application #:
|
13413162
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
METHOD FOR IMPLEMENTING SECURITY OF NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
13413440
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH COMPOSITE DRIFT REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13413652
|
Filing Dt:
|
03/07/2012
|
Publication #:
|
|
Pub Dt:
|
10/04/2012
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE AND LEAD FRAME THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
13414697
|
Filing Dt:
|
03/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
METHOD FOR TESTING COMPARATOR AND DEVICE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
13415196
|
Filing Dt:
|
03/08/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
MULTIPLE PAGE SIZE MEMORY MANAGEMENT UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13416892
|
Filing Dt:
|
03/09/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
CIRCUIT AND METHOD FOR MEASURING VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
13418994
|
Filing Dt:
|
03/13/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2015
|
Application #:
|
13419531
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
11/29/2012
| | | | |
Title:
|
DATA PROCESSING SYSTEM WITH LATENCY TOLERANCE EXECUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13424064
|
Filing Dt:
|
03/19/2012
|
Title:
|
SAMPLE AND HOLD CIRCUIT AND DIFFERENTIAL SAMPLE AND HOLD CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2015
|
Application #:
|
13431469
|
Filing Dt:
|
03/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
MICROELECTROMECHANICAL SYSTEM PACKAGE AND METHOD OF TESTING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13431506
|
Filing Dt:
|
03/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT HAVING A STAGGERED HETEROJUNCTION BIPOLAR TRANSISTOR ARRAY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13432544
|
Filing Dt:
|
03/28/2012
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
METHOD AND STRUCTURE TO IMPROVE BODY EFFECT AND JUNCTION CAPACITANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2012
|
Application #:
|
13434881
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
METHOD OF READING MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2013
|
Application #:
|
13434946
|
Filing Dt:
|
03/30/2012
|
Title:
|
PHASE LOCKED LOOP WITH ADAPTIVE BIASING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13435089
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
PHASE LOCKED LOOP WITH ADAPTIVE LOOP FILTER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13435981
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
FULLY COMPLEMENTARY SELF-BIASED DIFFERENTIAL RECEIVER WITH STARTUP CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13436052
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
SYSTEMS WITH MULTIPLE PORT RANDOM NUMBER GENERATORS AND METHODS OF THEIR OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13436074
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
RANDOM VALUE PRODUCTION METHODS AND SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
13436432
|
Filing Dt:
|
03/30/2012
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
MICROELECRONIC ASSEMBLY WITH AN EMBEDDED WAVEGUIDE ADAPTER AND METHOD FOR FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13439857
|
Filing Dt:
|
04/05/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
VITERBI DECODER FOR DECODING CONVOLUTIONALLY ENCODED DATA STREAM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2016
|
Application #:
|
13440728
|
Filing Dt:
|
04/05/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SYSTEM AND METHOD FOR CACHE ACCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2015
|
Application #:
|
13441217
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
ELECTRONIC DEVICES WITH MULTIPLE AMPLIFIER STAGES AND METHODS OF THEIR MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13441335
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SMART CHARGE PUMP CONFIGURATION FOR NON-VOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
13441414
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
WRITE CONTENTION-FREE, NOISE-TOLERANT MULTI-PORT BITCELL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13441426
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
NON-VOLATILE MEMORY (NVM) AND LOGIC INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13441448
|
Filing Dt:
|
04/06/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13441924
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
LEAD FRAME WITH GROOVED LEAD FINGER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
13441928
|
Filing Dt:
|
04/09/2012
|
Title:
|
METHOD OF ASSEMBLING PRESSURE SENSOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
13442014
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH EMBEDDED HEAT SPREADING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13442015
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH HEAT DISSIPATION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13442028
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
EMULATED ELECTRICALLY ERASABLE MEMORY HAVING SECTOR MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13442046
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
RERAM DEVICE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13442142
|
Filing Dt:
|
04/09/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
LOGIC TRANSISTOR AND NON-VOLATILE MEMORY CELL INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
13442864
|
Filing Dt:
|
04/10/2012
|
Title:
|
SCAN CHAIN RE-ORDERING IN ELECTRONIC CIRCUIT DESIGN BASED ON
REGION CONGESTION IN LAYOUT PLAN
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13442873
|
Filing Dt:
|
04/10/2012
|
Title:
|
SYSTEM TO INTERFACE ANALOG-TO-DIGITAL CONVERTERS TO INPUTS WITH ARBITRARY COMMON-MODES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13442878
|
Filing Dt:
|
04/10/2012
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
Title:
|
METHOD OF ASSEMBLING SEMICONDUCTOR DEVICE INCLUDING INSULATING SUBSTRATE AND HEAT SINK
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13443720
|
Filing Dt:
|
04/10/2012
|
Publication #:
|
|
Pub Dt:
|
10/10/2013
| | | | |
Title:
|
TEMPERATURE SENSOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13443906
|
Filing Dt:
|
04/11/2012
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
SEMICONDUCTOR TRAY CARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13444195
|
Filing Dt:
|
04/11/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
High Precision Single Edge Capture and Delay Measurement Circuit
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13445582
|
Filing Dt:
|
04/12/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
CONTROLLER FOR MANAGING A RESET OF A SUBSET OF THREADS IN A MULTI-THREAD SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13447305
|
Filing Dt:
|
04/16/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT POWER MANAGEMENT VERIFICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13447369
|
Filing Dt:
|
04/16/2012
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
METHOD OF FORMING AN INVERTED T SHAPED CHANNEL STRUCTURE FOR AN INVERTED T CHANNEL FIELD EFFECT TRANSISTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2017
|
Application #:
|
13448062
|
Filing Dt:
|
04/16/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
Semiconductor Device with False Drain
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13448531
|
Filing Dt:
|
04/17/2012
|
Publication #:
|
|
Pub Dt:
|
09/27/2012
| | | | |
Title:
|
SPLIT-GATE NON-VOLATILE MEMORY CELLS HAVING IMPROVED OVERLAP TOLERANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
13448994
|
Filing Dt:
|
04/17/2012
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH INTEGRATED BREAKDOWN PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2016
|
Application #:
|
13449411
|
Filing Dt:
|
04/18/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
PREDICATE TRACE COMPRESSION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13451312
|
Filing Dt:
|
04/19/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
SHARING STACKED BJT CLAMPS FOR SYSTEM LEVEL ESD PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13451876
|
Filing Dt:
|
04/20/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
METHODS AND SYSTEMS FOR ERASE BIASING OF SPLIT-GATE NON-VOLATILE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13452501
|
Filing Dt:
|
04/20/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
ERROR DETECTION WITHIN A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2016
|
Application #:
|
13452838
|
Filing Dt:
|
04/21/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
TWO-TOUCH GESTURE DETECTION ON A FOUR-WIRE RESISTIVE TOUCHSCREEN
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/2015
|
Application #:
|
13453127
|
Filing Dt:
|
04/23/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
High Speed Gallium Nitride Transistor Devices
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2015
|
Application #:
|
13454505
|
Filing Dt:
|
04/24/2012
|
Publication #:
|
|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
SYSTEM AND METHOD FOR DIRECT MEMORY ACCESS BUFFER UTILIZATION BY SETTING DMA CONTROLLER WITH PLURALITY OF ARBITRATION WEIGHTS ASSOCIATED WITH DIFFERENT DMA ENGINES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13455154
|
Filing Dt:
|
04/25/2012
|
Title:
|
PRESSURE SENSOR DEVICE AND METHOD OF ASSEMBLING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13455400
|
Filing Dt:
|
04/25/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
SAMPLE AND HOLD CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2016
|
Application #:
|
13455800
|
Filing Dt:
|
04/25/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
APPARATUS AND METHOD FOR MEMORY COPY AT A PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
13456217
|
Filing Dt:
|
04/26/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
BUFFER AND CONTROL CIRCUIT FOR SYNCHRONOUS MEMORY CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13457248
|
Filing Dt:
|
04/26/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
MEMORY WITH WORD LEVEL POWER GATING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13457669
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
EMULATED ELECTRICALLY ERASABLE MEMORY PARALLEL RECORD MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2012
|
Application #:
|
13457874
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
08/23/2012
| | | | |
Title:
|
INCIDENT AND REFLECTED SIGNAL PHASE DIFFERENCE DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13458205
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
DELAY COMPENSATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2016
|
Application #:
|
13458224
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
VERTICALLY PACKAGED INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/2015
|
Application #:
|
13458537
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
SENSOR DEVICE AND RELATED FABRICATION METHODS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13458947
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
MIM CAPACITOR FORMATION METHOD AND STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13458950
|
Filing Dt:
|
04/27/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
MICROELECTROMECHANICAL SYSTEMS DEVICES AND METHODS FOR THE FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13459344
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
ERASING A NON-VOLATILE MEMORY (NVM) SYSTEM HAVING ERROR CORRECTION CODE (ECC)
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13459500
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
NON-VOLATILE MEMORY (NVM) RESET SEQUENCE WITH BUILT-IN READ CHECK
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13459545
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
METHOD TO CONFIGURE SERIAL COMMUNICATIONS AND DEVICE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2017
|
Application #:
|
13459841
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
FIFO BUFFER SYSTEM PROVIDING SAME CLOCK CYCLE RESPONSE TO POP COMMANDS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13460020
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
GLASS FRIT WAFER BOND PROTECTIVE STRUCTURE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13460213
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
METHOD AND SYSTEM FOR WAFER AND STRIP LEVEL BATCH DIE ATTACH ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2014
|
Application #:
|
13460226
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
METHOD AND APPARATUS FOR RADIO-FREQUENCY CONTROLLABLE LED LAMP FIXTURE ANTENNA
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2016
|
Application #:
|
13460287
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
Virtualized Instruction Extensions for System Partitioning
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
13460719
|
Filing Dt:
|
04/30/2012
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
CRYPTOGRAPHIC PROCESSING WITH RANDOM NUMBER GENERATOR CHECKING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13461799
|
Filing Dt:
|
05/02/2012
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH HEAT SPREADER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13461801
|
Filing Dt:
|
05/02/2012
|
Publication #:
|
|
Pub Dt:
|
11/15/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH STAGGERED LEADS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13462823
|
Filing Dt:
|
05/03/2012
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
Title:
|
METHOD AND SYSTEM FOR TESTING OSCILLATOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13462827
|
Filing Dt:
|
05/03/2012
|
Publication #:
|
|
Pub Dt:
|
11/22/2012
| | | | |
Title:
|
FLANK WETTABLE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13462993
|
Filing Dt:
|
05/03/2012
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
APPARATUS AND METHOD FOR DYNAMIC ALLOCATION OF EXECUTION QUEUES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13465046
|
Filing Dt:
|
05/07/2012
|
Title:
|
LOW PASS FILTER CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
13465651
|
Filing Dt:
|
05/07/2012
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
TESTER AND METHOD FOR TESTING A STRIP OF DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13465761
|
Filing Dt:
|
05/07/2012
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
Semiconductor Device with Drain-End Drift Diminution
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13466642
|
Filing Dt:
|
05/08/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
MISMATCH VERIFICATION DEVICE AND METHODS THEREOF
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13470448
|
Filing Dt:
|
05/14/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
PASSIVATED TEST STRUCTURES TO ENABLE SAW SINGULATION OF WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13471402
|
Filing Dt:
|
05/14/2012
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
CELL BALANCE CONFIGURATION FOR PIN COUNT REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13472319
|
Filing Dt:
|
05/15/2012
|
Publication #:
|
|
Pub Dt:
|
11/21/2013
| | | | |
Title:
|
SYSTEMS AND METHODS FOR PROVIDING SEMAPHORE-BASED PROTECTION OF SYSTEM RESOURCES
|
|