|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
12849535
|
Filing Dt:
|
08/03/2010
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
Title:
|
LATERAL DRAIN MOSFET WITH IMPROVED CLAMPING VOLTAGE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
12849742
|
Filing Dt:
|
08/03/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
MICROMACHINED INERTIAL SENSOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
12849787
|
Filing Dt:
|
08/03/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
MICROMACHINED DEVICES AND FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
12854391
|
Filing Dt:
|
08/11/2010
|
Publication #:
|
|
Pub Dt:
|
02/16/2012
| | | | |
Title:
|
RESURF DEVICE INCLUDING INCREASED BREAKDOWN VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12855904
|
Filing Dt:
|
08/13/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
METHOD FOR CONNECTING A DIE ATTACH PAD TO A LEAD FRAME AND PRODUCT THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
12862163
|
Filing Dt:
|
08/24/2010
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
Title:
|
HIGH SPEED, LOW POWER CONSUMPTION, ISOLATED ANALOG CMOS UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
12869416
|
Filing Dt:
|
08/26/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR BRIDGELESS POWER FACTOR CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
12870600
|
Filing Dt:
|
08/27/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
STRUCTURE RELATED TO A THICK BOTTOM DIELECTRIC (TBD) FOR TRENCH-GATE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2012
|
Application #:
|
12874800
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
INTEGRATED CIRCUIT SINGLE ENDED-TO-DIFFERENTIAL AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
12874832
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
HIGH-IMPEDANCE NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
12878429
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
Power Semiconductor Devices Having Termination Structures
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
12878779
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
07/07/2011
| | | | |
Title:
|
NO POP SWITCH
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12882353
|
Filing Dt:
|
09/15/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
FLIP CHIP MLP WITH FOLDED HEAT SINK
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12883044
|
Filing Dt:
|
09/15/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
HIGH-POWER SEMICONDUCTOR DIE PACKAGES WITH INTEGRATED HEAT-SINK CAPABILITY AND METHODS OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12884072
|
Filing Dt:
|
09/16/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
POWER DEVICE WITH TRENCHES HAVING WIDER UPPER PORTION THAN LOWER PORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
12884874
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SAMPLED CHARGE CONTROL FOR RESONANT CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
12886614
|
Filing Dt:
|
09/21/2010
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
Title:
|
3D SMART POWER MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2015
|
Application #:
|
12887821
|
Filing Dt:
|
09/22/2010
|
Publication #:
|
|
Pub Dt:
|
02/17/2011
| | | | |
Title:
|
HIGH BOND LINE THICKNESS FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
|
Application #:
|
12890947
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING LATERAL TRENCH GATE FET WITH DIRECT SOURCE-DRAIN CURRENT PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
12891147
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING LOW RESISTANCE GATE FOR POWER MOSFET APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
12891616
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
STRUCTURE AND METHOD FOR FORMING FIELD EFFECT TRANSISTOR WITH LOW RESISTANCE CHANNEL REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12892817
|
Filing Dt:
|
09/28/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
Dynamic Selection of Oscillation Signal Frequency for Power Converter
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
12893997
|
Filing Dt:
|
09/29/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING A DUAL-TRENCH FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2012
|
Application #:
|
12899296
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
04/14/2011
| | | | |
Title:
|
HIGH IMPEDANCE BIAS NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
12899810
|
Filing Dt:
|
10/07/2010
|
Publication #:
|
|
Pub Dt:
|
04/14/2011
| | | | |
Title:
|
EDGE RATE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/30/2013
|
Application #:
|
12899829
|
Filing Dt:
|
10/07/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
AUTOMATIC GAIN CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
12904702
|
Filing Dt:
|
10/14/2010
|
Publication #:
|
|
Pub Dt:
|
04/19/2012
| | | | |
Title:
|
LOW POWER POWER-ON-RESET (POR) CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
12904742
|
Filing Dt:
|
10/14/2010
|
Publication #:
|
|
Pub Dt:
|
04/19/2012
| | | | |
Title:
|
Multiple switches and a delay circuit
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12906955
|
Filing Dt:
|
10/18/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
MICROMODULES INCLUDING INTEGRATED THIN FILM INDUCTORS AND METHODS OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12907805
|
Filing Dt:
|
10/19/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
STRUCTURE AND METHOD FOR FORMING LATERALLY EXTENDING DIELECTRIC LAYER IN A TRENCH-GATE FET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
12913897
|
Filing Dt:
|
10/28/2010
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
ACTIVE NOISE CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
12916045
|
Filing Dt:
|
10/29/2010
|
Publication #:
|
|
Pub Dt:
|
02/24/2011
| | | | |
Title:
|
METHOD AND APPARATUS FOR BONDED SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12917648
|
Filing Dt:
|
11/02/2010
|
Publication #:
|
|
Pub Dt:
|
02/24/2011
| | | | |
Title:
|
INTEGRATED LOW LEAKAGE DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12940319
|
Filing Dt:
|
11/05/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
MOLDED ULTRA THIN SEMICONDUCTOR DIE PACKAGES, SYSTEMS USING THE SAME, AND METHODS OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
12944192
|
Filing Dt:
|
11/11/2010
|
Publication #:
|
|
Pub Dt:
|
02/09/2012
| | | | |
Title:
|
HIGH-VOLTAGE PACKAGED DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
12945327
|
Filing Dt:
|
11/12/2010
|
Publication #:
|
|
Pub Dt:
|
05/17/2012
| | | | |
Title:
|
PASS TRANSISTOR CAPACITANCE AND JITTER REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
12946458
|
Filing Dt:
|
11/15/2010
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
SWITCH-MODE REGULATOR INCLUDING HYSTERETIC CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
12947543
|
Filing Dt:
|
11/16/2010
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
MICROELECTROMECHANICAL SYSTEMS MICROPHONE PACKAGING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
12949587
|
Filing Dt:
|
11/18/2010
|
Publication #:
|
|
Pub Dt:
|
03/17/2011
| | | | |
Title:
|
ISOLATED STACKED DIE SEMICONDUCTOR PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2012
|
Application #:
|
12952045
|
Filing Dt:
|
11/22/2010
|
Publication #:
|
|
Pub Dt:
|
09/22/2011
| | | | |
Title:
|
OPTIMIZING OPERATION OF DC-TO-AC POWER CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
12953162
|
Filing Dt:
|
11/23/2010
|
Publication #:
|
|
Pub Dt:
|
05/24/2012
| | | | |
Title:
|
STABLE ON-RESISTANCE SWITCH CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12958689
|
Filing Dt:
|
12/02/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
METHOD FOR FORMING A SHIELDED GATE TRENCH FET
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
12964691
|
Filing Dt:
|
12/09/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
MULTI-CHIP MODULE FOR BATTERY POWER CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2011
|
Application #:
|
12964933
|
Filing Dt:
|
12/10/2010
|
Publication #:
|
|
Pub Dt:
|
03/31/2011
| | | | |
Title:
|
SELF LOCKING AND ALIGNING CLIP STRUCTURE FOR SEMICONDUCTOR DIE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2015
|
Application #:
|
12965611
|
Filing Dt:
|
12/10/2010
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
FUSE DRIVER CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2013
|
Application #:
|
12974599
|
Filing Dt:
|
12/21/2010
|
Publication #:
|
|
Pub Dt:
|
04/21/2011
| | | | |
Title:
|
WIDE BANDGAP DEVICE IN PARALLEL WITH A DEVICE THAT HAS A LOWER AVALANCHE BREAKDOWN VOLTAGE AND A HIGHER FORWARD VOLTAGE DROP THAN THE WIDE BANDGAP DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
12977535
|
Filing Dt:
|
12/23/2010
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
MULTI-LEVEL CONTROL FOR PASS TRANSISTOR GATE VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12982051
|
Filing Dt:
|
12/30/2010
|
Publication #:
|
|
Pub Dt:
|
04/21/2011
| | | | |
Title:
|
POWER DEVICE WITH IMPROVED EDGE TERMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
12982509
|
Filing Dt:
|
12/30/2010
|
Publication #:
|
|
Pub Dt:
|
04/28/2011
| | | | |
Title:
|
METHOD OF FORMING A TOPSIDE CONTACT TO A BACKSIDE TERMINAL OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/2015
|
Application #:
|
12982939
|
Filing Dt:
|
12/31/2010
|
Publication #:
|
|
Pub Dt:
|
05/24/2012
| | | | |
Title:
|
INPUT POWER PORT PROTECTION COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
13005593
|
Filing Dt:
|
01/13/2011
|
Publication #:
|
|
Pub Dt:
|
05/05/2011
| | | | |
Title:
|
INTEGRATED COMPLEMENTARY LOW VOLTAGE RF-LDMOS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
13005618
|
Filing Dt:
|
01/13/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
SIP SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13014317
|
Filing Dt:
|
01/26/2011
|
Publication #:
|
|
Pub Dt:
|
10/20/2011
| | | | |
Title:
|
DIFFERENTIAL THERMISTOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13015448
|
Filing Dt:
|
01/27/2011
|
Publication #:
|
|
Pub Dt:
|
08/11/2011
| | | | |
Title:
|
STRUCTURE AND METHOD FOR POST OXIDATION SILICON TRENCH BOTTOM SHAPING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2013
|
Application #:
|
13015666
|
Filing Dt:
|
01/28/2011
|
Publication #:
|
|
Pub Dt:
|
05/26/2011
| | | | |
Title:
|
METHOD TO IMPROVE THE RELIABILITY OF THE BREAKDOWN VOLTAGE IN HIGH VOLTAGE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13026449
|
Filing Dt:
|
02/14/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
ADAPTIVE RESPONSE TIME ACCELERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13028054
|
Filing Dt:
|
02/15/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
STRUCTURE AND METHOD FOR SEMICONDUCTOR POWER DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
13028302
|
Filing Dt:
|
02/16/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
DYNAMIC CURRENT BOOST IN CLASS AB AMPLIFIER FOR LOW DISTORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13028731
|
Filing Dt:
|
02/16/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
PASS GATE OFF ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13030092
|
Filing Dt:
|
02/17/2011
|
Publication #:
|
|
Pub Dt:
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08/23/2012
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Title:
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POWER MODULES WITH REVERSE POLARITY PROTECTION
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13034584
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Filing Dt:
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02/24/2011
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Publication #:
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Pub Dt:
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06/16/2011
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Title:
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SEMICONDUCTOR DIE PACKAGE INCLUDING IC DRIVER AND BRIDGE
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13035653
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Filing Dt:
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02/25/2011
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Publication #:
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Pub Dt:
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09/01/2011
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Title:
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LOW TEMPERATURE DIELECTRIC FLOW USING MICROWAVES
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13042078
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Filing Dt:
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03/07/2011
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Publication #:
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Pub Dt:
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09/13/2012
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Title:
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LAMBDA CORRECTION FOR CURRENT FOLDBACK
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13042292
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Filing Dt:
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03/07/2011
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Publication #:
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Pub Dt:
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03/08/2012
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Title:
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METHOD OF FORMING SHIELDED GATE POWER TRANSISTOR UTILIZING CHEMICAL MECHANICAL PLANARIZATION
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13049629
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Filing Dt:
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03/16/2011
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Publication #:
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Pub Dt:
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09/20/2012
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Title:
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MOSFET DEVICE WITH THICK TRENCH BOTTOM OXIDE
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13049655
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Filing Dt:
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03/16/2011
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Publication #:
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Pub Dt:
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09/20/2012
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Title:
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INTER-POLY DIELECTRIC IN A SHIELDED GATE MOSFET DEVICE
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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13069624
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Filing Dt:
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03/23/2011
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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BUFFER SYSTEM HAVING REDUCED THRESHOLD CURRENT
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Patent #:
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Issue Dt:
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05/28/2013
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Application #:
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13072494
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
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07/14/2011
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Title:
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LDMOS WITH SELF ALIGNED VERTICAL LDD BACKSIDE DRAIN
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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13074921
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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10/04/2012
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Title:
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A VERTICAL MOSFET TRANSISTOR HAVING SOURCE/DRAIN CONTACTS DISPOSED ON THE SAME SIDE AND METHOD FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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13075091
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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07/21/2011
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Title:
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METHOD OF FORMING TRENCH-GATE FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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08/12/2014
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Application #:
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13081400
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Filing Dt:
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04/06/2011
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Publication #:
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Pub Dt:
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09/01/2011
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Title:
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SHIELDED GATE FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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13083253
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/06/2011
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Title:
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SHIELDED GATE TRENCH FET WITH AN INTER-ELECTRODE DIELECTRIC HAVING A LOW-K DIELECTRIC THEREIN
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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13083406
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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07/12/2012
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Title:
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METHOD FOR FORMING ACCUMULATION-MODE FIELD EFFECT TRANSISTOR WITH IMPROVED CURRENT CAPABILITY
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13091578
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Filing Dt:
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04/21/2011
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Publication #:
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Pub Dt:
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10/25/2012
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Title:
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DOUBLE LAYER METAL (DLM) POWER MOSFET
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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13091681
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Filing Dt:
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04/21/2011
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Publication #:
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Pub Dt:
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10/25/2012
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Title:
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MULTI-LEVEL OPTIONS FOR POWER MOSFETS
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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13093629
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Filing Dt:
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04/25/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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SYNCHRONIZING FREQUENCY AND PHASE OF MULTIPLE VARIABLE FREQUENCY POWER CONVERTERS
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Patent #:
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Issue Dt:
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01/01/2013
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Application #:
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13095584
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
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08/18/2011
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Title:
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METHOD AND STRUCTURE FOR DIVIDING A SUBSTRATE INTO INDIVIDUAL DEVICES
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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13095664
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Superjunction Structures for Power Devices and Methods of Manufacture
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Patent #:
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Issue Dt:
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07/08/2014
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Application #:
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13095670
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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SUPERJUNCTION STRUCTURES FOR POWER DEVICES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13095678
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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SUPERJUNCTION STRUCTURES FOR POWER DEVICES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13095690
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Filing Dt:
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04/27/2011
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Publication #:
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Pub Dt:
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11/01/2012
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Title:
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Superjunction Structures for Power Devices and Methods of Manufacture
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13098898
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Filing Dt:
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05/02/2011
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Publication #:
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Pub Dt:
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11/08/2012
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Title:
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LOW LATENCY INTERRUPT COLLECTOR
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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13102667
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Filing Dt:
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05/06/2011
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Publication #:
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Pub Dt:
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11/08/2012
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Title:
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EFFICIENT INPUT VOLTAGE SENSING TECHNIQUE
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13103514
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Filing Dt:
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05/09/2011
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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ESD PROTECTION ON HIGH IMPEDANCE MIC INPUT
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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13103728
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Filing Dt:
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05/09/2011
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Publication #:
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Pub Dt:
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09/08/2011
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Title:
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STRUCTURE AND METHOD FOR FORMING PLANAR GATE FIELD EFFECT TRANSISTOR WITH LOW RESISTANCE CHANNEL REGION
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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13104006
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Filing Dt:
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05/09/2011
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Publication #:
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Pub Dt:
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11/10/2011
| | | | |
Title:
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SHIELD CONTACTS IN A SHIELDED GATE MOSFET
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13107491
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Filing Dt:
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05/13/2011
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Publication #:
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Pub Dt:
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11/15/2012
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Title:
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CONSTANT VGS ANALOG SWITCH
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Patent #:
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Issue Dt:
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08/26/2014
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Application #:
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13109440
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Filing Dt:
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05/17/2011
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Publication #:
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Pub Dt:
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11/22/2012
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Title:
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CAPACITOR CONTROLLED SWITCH SYSTEM
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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13109485
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Filing Dt:
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05/17/2011
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Publication #:
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Pub Dt:
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11/22/2012
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Title:
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REMOTE DISPLAY GLASSES CAMERA SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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13110865
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Filing Dt:
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05/18/2011
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Publication #:
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Pub Dt:
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11/22/2012
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Title:
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EMBEDDED SEMICONDUCTOR POWER MODULES AND PACKAGES
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Patent #:
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Issue Dt:
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07/12/2016
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Application #:
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13114738
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Filing Dt:
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05/24/2011
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Publication #:
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Pub Dt:
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11/29/2012
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Title:
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UNDER VOLTAGE TOLERANT CLAMP
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Patent #:
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Issue Dt:
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12/08/2015
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Application #:
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13114761
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Filing Dt:
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05/24/2011
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Publication #:
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Pub Dt:
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12/01/2011
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Title:
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VBUS POWER SWITCH
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13149399
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Filing Dt:
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05/31/2011
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Publication #:
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Pub Dt:
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12/06/2012
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Title:
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RAIL TO RAIL COMPARATOR WITH WIDE HYSTERESIS AND MEMORY
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13151495
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Filing Dt:
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06/02/2011
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Publication #:
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Pub Dt:
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09/22/2011
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Title:
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SEMICONDUCTOR DICE WITH BACKSIDE TRENCHES FILLED WITH ELASTIC MATERIAL FOR IMPROVED ATTACHMENT, PACKAGES USING THE SAME, AND METHODS OF MAKING THE SAME
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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13152041
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Filing Dt:
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06/02/2011
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Publication #:
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Pub Dt:
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12/15/2011
| | | | |
Title:
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FIELD EFFECT TRANSISTOR WITH GATED AND NON-GATED TRENCHES
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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13154228
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Filing Dt:
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06/06/2011
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Publication #:
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Pub Dt:
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06/07/2012
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Title:
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HIGH ASPECT RATIO TRENCH STRUCTURES WITH VOID-FREE FILL MATERIAL
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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13156067
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Filing Dt:
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06/08/2011
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Publication #:
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Pub Dt:
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12/13/2012
| | | | |
Title:
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OUTPUT BUFFER WITH ADJUSTABLE FEEDBACK
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Patent #:
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Issue Dt:
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01/29/2013
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Application #:
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13158927
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Filing Dt:
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06/13/2011
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Publication #:
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Pub Dt:
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07/26/2012
| | | | |
Title:
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TRENCH POWER MOSFET WITH REDUCED ON-RESISTANCE
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Patent #:
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Issue Dt:
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09/02/2014
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Application #:
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13159167
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Filing Dt:
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06/13/2011
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Publication #:
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Pub Dt:
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08/16/2012
| | | | |
Title:
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DETERMINING AUTOMATIC GAIN CONTROL LEVELS
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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13171577
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Filing Dt:
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06/29/2011
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Title:
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WAFER LEVEL EMBEDDED AND STACKED DIE POWER SYSTEM-IN-PACKAGE PACKAGES
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