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Patent Assignment Details
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Reel/Frame:010996/0537   Pages: 48
Recorded: 07/27/2000
Conveyance: RELEASE
Total properties: 210
Page 3 of 3
Pages: 1 2 3
1
Patent #:
NONE
Issue Dt:
Application #:
09217687
Filing Dt:
12/21/1998
Publication #:
Pub Dt:
08/16/2001
Title:
LOCK BIT FOR AN ELECTRICALLY ERASABLE MEMORY WORD
2
Patent #:
Issue Dt:
10/05/1999
Application #:
09219403
Filing Dt:
12/23/1998
Title:
UNDERSHOOT HARDENED FET SWITCH
3
Patent #:
Issue Dt:
04/16/2002
Application #:
09233723
Filing Dt:
01/08/1999
Title:
PROGRAMMABLE LOW BATTERY DETECTOR
4
Patent #:
Issue Dt:
01/09/2001
Application #:
09234267
Filing Dt:
01/20/1999
Title:
CHARGE SHARING CIRCUIT FOR FANOUT BUFFER
5
Patent #:
Issue Dt:
01/16/2001
Application #:
09240064
Filing Dt:
01/29/1999
Title:
HIGH SPEED LOW SKEW CMOS TO ECL CONVERTER
6
Patent #:
Issue Dt:
12/19/2000
Application #:
09240544
Filing Dt:
01/29/1999
Title:
OVERVOLTAGE/UNDERVOLTAGE TOLERANT TRANSFER GATE
7
Patent #:
Issue Dt:
06/26/2001
Application #:
09267739
Filing Dt:
03/15/1999
Title:
DIFFERENTIAL-INPUT/SINGLE-ENDED-OUTPUT TRANSLATOR
8
Patent #:
Issue Dt:
02/26/2002
Application #:
09267921
Filing Dt:
02/26/1999
Title:
MONOLITHICALLY INTEGRATED TRENCH MOSFET AND SCHOTTKY DIODE
9
Patent #:
Issue Dt:
03/06/2001
Application #:
09281465
Filing Dt:
03/30/1999
Title:
CIRCUIT FOR DYNAMIC SWITCHING OF A BUFFER THRESHOLD
10
Patent #:
Issue Dt:
12/03/2002
Application #:
09285191
Filing Dt:
03/15/1999
Title:
HIGH PERFORMANCE MULTI-CHIP FLIP CHIP PACKAGE
Assignor
1
Exec Dt:
06/02/2000
Assignee
1
82 RUNNING HILL ROAD
SOUTH PORTLAND, MAINE 14106
Correspondence name and address
FEDERAL RESEARCH CORPORATION
PENELOPE AGODOA
SUITE 101
400 SEVENTH STREET, N.W.
WASHINGTON, DC 20004

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