USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	051489/0557			Pages:	23
		Recorded:	01/06/2020
Attorney Dkt #:	IBM5-TESS-US-PAT-1
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 327
Page 1 of 4
Pages: 1 2 3 4

Patent #:	7456095	Issue Dt:	11/25/2008	Application #:	11163038	Filing Dt:	10/03/2005
Publication #:	US20070077760	Pub Dt:	04/05/2007
Title:	METHOD AND APPARATUS FOR FORMING NICKEL SILICIDE WITH LOW DEFECT DENSITY IN FET DEVICES

Patent #:	7301236	Issue Dt:	11/27/2007	Application #:	11163410	Filing Dt:	10/18/2005
Publication #:	US20070087555	Pub Dt:	04/19/2007
Title:	INCREASING ELECTROMIGRATION LIFETIME AND CURRENT DENSITY IN IC USING VERTICALLY UPWARDLY EXTENDING DUMMY VIA

Patent #:	7563714	Issue Dt:	07/21/2009	Application #:	11275542	Filing Dt:	01/13/2006
Publication #:	US20070190692	Pub Dt:	08/16/2007
Title:	LOW RESISTANCE AND INDUCTANCE BACKSIDE THROUGH VIAS AND METHODS OF FABRICATING SAME

Patent #:	7439173	Issue Dt:	10/21/2008	Application #:	11869044	Filing Dt:	10/09/2007
Publication #:	US20080026567	Pub Dt:	01/31/2008
Title:	INCREASING ELECTROMIGRATION LIFETIME AND CURRENT DENSITY IN IC USING VERTICALLY UPWARDLY EXTENDING DUMMY VIA

Patent #:	7843063	Issue Dt:	11/30/2010	Application #:	12031103	Filing Dt:	02/14/2008
Publication #:	US20090206484	Pub Dt:	08/20/2009
Title:	MICROSTRUCTURE MODIFICATION IN COPPER INTERCONNECT STRUCTURE

Patent #:	8298385	Issue Dt:	10/30/2012	Application #:	12047561	Filing Dt:	03/13/2008
Publication #:	US20080156265	Pub Dt:	07/03/2008
Title:	METHOD AND APPARATUS FOR FORMING NICKEL SILICIDE WITH LOW DEFECT DENSITY IN FET DEVICES

Patent #:	7759741	Issue Dt:	07/20/2010	Application #:	12049595	Filing Dt:	03/17/2008
Publication #:	US20080164540	Pub Dt:	07/10/2008
Title:	METHOD AND APPARATUS FOR FORMING NICKEL SILICIDE WITH LOW DEFECT DENSITY IN FET DEVICES

Patent #:	7851923	Issue Dt:	12/14/2010	Application #:	12410728	Filing Dt:	03/25/2009
Publication #:	US20090184423	Pub Dt:	07/23/2009
Title:	LOW RESISTANCE AND INDUCTANCE BACKSIDE THROUGH VIAS AND METHODS OF FABRICATING SAME

Patent #:	8558345	Issue Dt:	10/15/2013	Application #:	12614883	Filing Dt:	11/09/2009
Publication #:	US20110108948	Pub Dt:	05/12/2011
Title:	INTEGRATED DECOUPLING CAPACITOR EMPLOYING CONDUCTIVE THROUGH-SUBSTRATE VIAS

Patent #:	8169055	Issue Dt:	05/01/2012	Application #:	12634726	Filing Dt:	12/10/2009
Publication #:	US20100237472	Pub Dt:	09/23/2010
Title:	CHIP GUARD RING INCLUDING A THROUGH-SUBSTRATE VIA

Patent #:	8188591	Issue Dt:	05/29/2012	Application #:	12835306	Filing Dt:	07/13/2010
Publication #:	US20120013017	Pub Dt:	01/19/2012
Title:	INTEGRATED STRUCTURES OF HIGH PERFORMANCE ACTIVE DEVICES AND PASSIVE DEVICES

Patent #:	8008199	Issue Dt:	08/30/2011	Application #:	12869113	Filing Dt:	08/26/2010
Publication #:	US20100323517	Pub Dt:	12/23/2010
Title:	MICROSTRUCTURE MODIFICATION IN COPPER INTERCONNECT STRUCTURE

Patent #:	8293578	Issue Dt:	10/23/2012	Application #:	12911879	Filing Dt:	10/26/2010
Publication #:	US20120098140	Pub Dt:	04/26/2012
Title:	HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

Patent #:	9305882	Issue Dt:	04/05/2016	Application #:	13083550	Filing Dt:	04/09/2011
Publication #:	US20110210448	Pub Dt:	09/01/2011
Title:	Interconnect Structures Incorporating Air-Gap Spacers

Patent #:	9263391	Issue Dt:	02/16/2016	Application #:	13089958	Filing Dt:	04/19/2011
Publication #:	US20110210449	Pub Dt:	09/01/2011
Title:	INTERCONNECT STRUCTURES INCORPORATING AIR-GAP SPACERS

Patent #:	8928100	Issue Dt:	01/06/2015	Application #:	13168477	Filing Dt:	06/24/2011
Publication #:	US20120326250	Pub Dt:	12/27/2012
Title:	SPIN TRANSFER TORQUE CELL FOR MAGNETIC RANDOM ACCESS MEMORY

Patent #:	8648454	Issue Dt:	02/11/2014	Application #:	13396030	Filing Dt:	02/14/2012
Publication #:	US20130207274	Pub Dt:	08/15/2013
Title:	WAFER-SCALE PACKAGE STRUCTURES WITH INTEGRATED ANTENNAS

Patent #:	8736068	Issue Dt:	05/27/2014	Application #:	13422606	Filing Dt:	03/16/2012
Publication #:	US20120187570	Pub Dt:	07/26/2012
Title:	HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

Patent #:	8232139	Issue Dt:	07/31/2012	Application #:	13426835	Filing Dt:	03/22/2012
Publication #:	US20120192139	Pub Dt:	07/26/2012
Title:	INTEGRATED STRUCTURES OF HIGH PERFORMANCE ACTIVE DEVICES AND PASSIVE DEVICES

Patent #:	8659077	Issue Dt:	02/25/2014	Application #:	13615343	Filing Dt:	09/13/2012
Publication #:	US20140070307	Pub Dt:	03/13/2014
Title:	MULTI-LAYER WORK FUNCTION METAL REPLACEMENT GATE

Patent #:	8647972	Issue Dt:	02/11/2014	Application #:	13618255	Filing Dt:	09/14/2012
Title:	MULTI-LAYER WORK FUNCTION METAL REPLACEMENT GATE

Patent #:	9202743	Issue Dt:	12/01/2015	Application #:	13716636	Filing Dt:	12/17/2012
Publication #:	US20140167268	Pub Dt:	06/19/2014
Title:	GRAPHENE AND METAL INTERCONNECTS

Patent #:	8802512	Issue Dt:	08/12/2014	Application #:	13739182	Filing Dt:	01/11/2013
Publication #:	US20140197370	Pub Dt:	07/17/2014
Title:	OVERLAP CAPACITANCE NANOWIRE

Patent #:	9190321	Issue Dt:	11/17/2015	Application #:	13858125	Filing Dt:	04/08/2013
Publication #:	US20140299988	Pub Dt:	10/09/2014
Title:	SELF-FORMING EMBEDDED DIFFUSION BARRIERS

Patent #:	8969149	Issue Dt:	03/03/2015	Application #:	13893896	Filing Dt:	05/14/2013
Publication #:	US20140339611	Pub Dt:	11/20/2014
Title:	STACKED SEMICONDUCTOR NANOWIRES WITH TUNNEL SPACERS

Patent #:	9000413	Issue Dt:	04/07/2015	Application #:	13970931	Filing Dt:	08/20/2013
Publication #:	US20140197371	Pub Dt:	07/17/2014
Title:	OVERLAP CAPACITANCE NANOWIRE

Patent #:	8785289	Issue Dt:	07/22/2014	Application #:	13975519	Filing Dt:	08/26/2013
Publication #:	US20130344675	Pub Dt:	12/26/2013
Title:	INTEGRATED DECOUPLING CAPACITOR EMPLOYING CONDUCTIVE THROUGH-SUBSTRATE VIAS

Patent #:	8994081	Issue Dt:	03/31/2015	Application #:	14028053	Filing Dt:	09/16/2013
Publication #:	US20140339507	Pub Dt:	11/20/2014
Title:	STACKED SEMICONDUCTOR NANOWIRES WITH TUNNEL SPACERS

Patent #:	9159671	Issue Dt:	10/13/2015	Application #:	14083929	Filing Dt:	11/19/2013
Publication #:	US20150137374	Pub Dt:	05/21/2015
Title:	COPPER WIRE AND DIELECTRIC WITH AIR GAPS

Patent #:	9064901	Issue Dt:	06/23/2015	Application #:	14139121	Filing Dt:	12/23/2013
Publication #:	US20150179769	Pub Dt:	06/25/2015
Title:	FIN DENSITY CONTROL OF MULTIGATE DEVICES THROUGH SIDEWALL IMAGE TRANSFER PROCESSES

Patent #:	9349836	Issue Dt:	05/24/2016	Application #:	14154206	Filing Dt:	01/14/2014
Publication #:	US20150200291	Pub Dt:	07/16/2015
Title:	FIN END SPACER FOR PREVENTING MERGER OF RAISED ACTIVE REGIONS

Patent #:	9252243	Issue Dt:	02/02/2016	Application #:	14175441	Filing Dt:	02/07/2014
Publication #:	US20150228762	Pub Dt:	08/13/2015
Title:	GATE STRUCTURE INTEGRATION SCHEME FOR FIN FIELD EFFECT TRANSISTORS

Patent #:	9324710	Issue Dt:	04/26/2016	Application #:	14187896	Filing Dt:	02/24/2014
Publication #:	US20150243651	Pub Dt:	08/27/2015
Title:	VERY PLANAR GATE CUT POST REPLACEMENT GATE PROCESS

Patent #:	9257289	Issue Dt:	02/09/2016	Application #:	14197959	Filing Dt:	03/05/2014
Publication #:	US20150255294	Pub Dt:	09/10/2015
Title:	LOWERING PARASITIC CAPACITANCE OF REPLACEMENT METAL GATE PROCESSES

Patent #:	9515164	Issue Dt:	12/06/2016	Application #:	14198976	Filing Dt:	03/06/2014
Publication #:	US20150255463	Pub Dt:	09/10/2015
Title:	METHODS AND STRUCTURE TO FORM HIGH K METAL GATE STACK WITH SINGLE WORK-FUNCTION METAL

Patent #:	9318384	Issue Dt:	04/19/2016	Application #:	14223282	Filing Dt:	03/24/2014
Publication #:	US20150270171	Pub Dt:	09/24/2015
Title:	DIELECTRIC LINER FOR A SELF-ALIGNED CONTACT VIA STRUCTURE

Patent #:	9196612	Issue Dt:	11/24/2015	Application #:	14225812	Filing Dt:	03/26/2014
Publication #:	US20150279839	Pub Dt:	10/01/2015
Title:	SEMICONDUCTOR DEVICE INCLUDING MERGED-UNMERGED WORK FUNCTION METAL AND VARIABLE FIN PITCH

Patent #:	9324830	Issue Dt:	04/26/2016	Application #:	14227345	Filing Dt:	03/27/2014
Publication #:	US20150279996	Pub Dt:	10/01/2015
Title:	SELF-ALIGNED CONTACT PROCESS ENABLED BY LOW TEMPERATURE

Patent #:	9385123	Issue Dt:	07/05/2016	Application #:	14281931	Filing Dt:	05/20/2014
Publication #:	US20150340272	Pub Dt:	11/26/2015
Title:	STI REGION FOR SMALL FIN PITCH IN FINFET DEVICES

Patent #:	9269792	Issue Dt:	02/23/2016	Application #:	14299300	Filing Dt:	06/09/2014
Publication #:	US20150357440	Pub Dt:	12/10/2015
Title:	METHOD AND STRUCTURE FOR ROBUST FINFET REPLACEMENT METAL GATE INTEGRATION

Patent #:	9331146	Issue Dt:	05/03/2016	Application #:	14301587	Filing Dt:	06/11/2014
Publication #:	US20150364543	Pub Dt:	12/17/2015
Title:	SILICON NANOWIRE FORMATION IN REPLACEMENT METAL GATE PROCESS

Patent #:	9613954	Issue Dt:	04/04/2017	Application #:	14325547	Filing Dt:	07/08/2014
Publication #:	US20160013183	Pub Dt:	01/14/2016
Title:	SELECTIVE REMOVAL OF SEMICONDUCTOR FINS

Patent #:	9536879	Issue Dt:	01/03/2017	Application #:	14326745	Filing Dt:	07/09/2014
Publication #:	US20160013185	Pub Dt:	01/14/2016
Title:	FINFET WITH CONSTRAINED SOURCE-DRAIN EPITAXIAL REGION

Patent #:	9472628	Issue Dt:	10/18/2016	Application #:	14330158	Filing Dt:	07/14/2014
Publication #:	US20160013313	Pub Dt:	01/14/2016
Title:	HETEROGENEOUS SOURCE DRAIN REGION AND EXTENSION REGION

Patent #:	9349691	Issue Dt:	05/24/2016	Application #:	14339704	Filing Dt:	07/24/2014
Publication #:	US20160027738	Pub Dt:	01/28/2016
Title:	SEMICONDUCTOR DEVICE WITH REDUCED VIA RESISTANCE

Patent #:	9455182	Issue Dt:	09/27/2016	Application #:	14466539	Filing Dt:	08/22/2014
Publication #:	US20160056076	Pub Dt:	02/25/2016
Title:	INTERCONNECT STRUCTURE WITH CAPPING LAYER AND BARRIER LAYER

Patent #:	9305845	Issue Dt:	04/05/2016	Application #:	14477450	Filing Dt:	09/04/2014
Publication #:	US20160071771	Pub Dt:	03/10/2016
Title:	SELF-ALIGNED QUADRUPLE PATTERNING PROCESS

Patent #:	9269627	Issue Dt:	02/23/2016	Application #:	14501654	Filing Dt:	09/30/2014
Title:	FIN CUT ON SIT LEVEL

Patent #:	9362170	Issue Dt:	06/07/2016	Application #:	14510606	Filing Dt:	10/09/2014
Publication #:	US20150270359	Pub Dt:	09/24/2015
Title:	DIELECTRIC LINER FOR A SELF-ALIGNED CONTACT VIA STRUCTURE

Patent #:	9230914	Issue Dt:	01/05/2016	Application #:	14526741	Filing Dt:	10/29/2014
Publication #:	US20150137375	Pub Dt:	05/21/2015
Title:	COPPER WIRE AND DIELECTRIC WITH AIR GAPS

Patent #:	9305836	Issue Dt:	04/05/2016	Application #:	14536751	Filing Dt:	11/10/2014
Title:	AIR GAP SEMICONDUCTOR STRUCTURE WITH SELECTIVE CAP BILAYER

Patent #:	9419097	Issue Dt:	08/16/2016	Application #:	14551322	Filing Dt:	11/24/2014
Publication #:	US20160149016	Pub Dt:	05/26/2016
Title:	REPLACEMENT METAL GATE DIELECTRIC CAP

Patent #:	9412667	Issue Dt:	08/09/2016	Application #:	14553521	Filing Dt:	11/25/2014
Publication #:	US20160149013	Pub Dt:	05/26/2016
Title:	ASYMMETRIC HIGH-K DIELECTRIC FOR REDUCING GATE INDUCED DRAIN LEAKAGE

Patent #:	9082963	Issue Dt:	07/14/2015	Application #:	14556967	Filing Dt:	12/01/2014
Publication #:	US20150087080	Pub Dt:	03/26/2015
Title:	SPIN TRANSFER TORQUE CELL FOR MAGNETIC RANDOM ACCESS MEMORY

Patent #:	9293412	Issue Dt:	03/22/2016	Application #:	14559962	Filing Dt:	12/04/2014
Publication #:	US20150137377	Pub Dt:	05/21/2015
Title:	GRAPHENE AND METAL INTERCONNECTS WITH REDUCED CONTACT RESISTANCE

Patent #:	9711452	Issue Dt:	07/18/2017	Application #:	14561514	Filing Dt:	12/05/2014
Publication #:	US20160163651	Pub Dt:	06/09/2016
Title:	OPTIMIZED WIRES FOR RESISTANCE OR ELECTROMIGRATION

Patent #:	9455195	Issue Dt:	09/27/2016	Application #:	14561550	Filing Dt:	12/05/2014
Publication #:	US20160163599	Pub Dt:	06/09/2016
Title:	METHOD OF FORMING PERFORMANCE OPTIMIZED GATE STRUCTURES BY SILICIDIZING LOWERED SOURCE AND DRAIN REGIONS

Patent #:	9559191	Issue Dt:	01/31/2017	Application #:	14578842	Filing Dt:	12/22/2014
Publication #:	US20150303284	Pub Dt:	10/22/2015
Title:	PUNCH THROUGH STOPPER IN BULK FINFET DEVICE

Patent #:	9391173	Issue Dt:	07/12/2016	Application #:	14583454	Filing Dt:	12/26/2014
Publication #:	US20150303281	Pub Dt:	10/22/2015
Title:	FINFET DEVICE WITH VERTICAL SILICIDE ON RECESSED SOURCE/DRAIN EPITAXY REGIONS

Patent #:	9337094	Issue Dt:	05/10/2016	Application #:	14589222	Filing Dt:	01/05/2015
Title:	METHOD OF FORMING CONTACT USEFUL IN REPLACEMENT METAL GATE PROCESSING AND RELATED SEMICONDUCTOR STRUCTURE

Patent #:	9859275	Issue Dt:	01/02/2018	Application #:	14605142	Filing Dt:	01/26/2015
Publication #:	US20160218102	Pub Dt:	07/28/2016
Title:	SILICON NITRIDE FILL FOR PC GAP REGIONS TO INCREASE CELL DENSITY

Patent #:	9419091	Issue Dt:	08/16/2016	Application #:	14613667	Filing Dt:	02/04/2015
Publication #:	US20160225873	Pub Dt:	08/04/2016
Title:	TRENCHED GATE WITH SIDEWALL AIRGAP SPACER

Patent #:	9484250	Issue Dt:	11/01/2016	Application #:	14643011	Filing Dt:	03/10/2015
Publication #:	US20160268158	Pub Dt:	09/15/2016
Title:	AIR GAP CONTACT FORMATION FOR REDUCING PARASITIC CAPACITANCE

Patent #:	9390980	Issue Dt:	07/12/2016	Application #:	14666520	Filing Dt:	03/24/2015
Title:	III-V COMPOUND AND GERMANIUM COMPOUND NANOWIRE SUSPENSION WITH GERMANIUM-CONTAINING RELEASE LAYER

Patent #:	10319860	Issue Dt:	06/11/2019	Application #:	14667349	Filing Dt:	03/24/2015
Publication #:	US20150214371	Pub Dt:	07/30/2015
Title:	OVERLAP CAPACITANCE NANOWIRE

Patent #:	9728462	Issue Dt:	08/08/2017	Application #:	14672350	Filing Dt:	03/30/2015
Publication #:	US20160293492	Pub Dt:	10/06/2016
Title:	STABLE MULTIPLE THRESHOLD VOLTAGE DEVICES ON REPLACEMENT METAL GATE CMOS DEVICES

Patent #:	9443853	Issue Dt:	09/13/2016	Application #:	14680099	Filing Dt:	04/07/2015
Title:	MINIMIZING SHORTING BETWEEN FINFET EPITAXIAL REGIONS

Patent #:	9728419	Issue Dt:	08/08/2017	Application #:	14697306	Filing Dt:	04/27/2015
Publication #:	US20150243513	Pub Dt:	08/27/2015
Title:	FIN DENSITY CONTROL OF MULTIGATE DEVICES THROUGH SIDEWALL IMAGE TRANSFER PROCESSES

Patent #:	9318698	Issue Dt:	04/19/2016	Application #:	14699716	Filing Dt:	04/29/2015
Publication #:	US20150236252	Pub Dt:	08/20/2015
Title:	SPIN TRANSFER TORQUE CELL FOR MAGNETIC RANDOM ACCESS MEMORY

Patent #:	9356027	Issue Dt:	05/31/2016	Application #:	14708885	Filing Dt:	05/11/2015
Title:	DUAL WORK FUNCTION INTEGRATION FOR STACKED FINFET

Patent #:	9876074	Issue Dt:	01/23/2018	Application #:	14719829	Filing Dt:	05/22/2015
Publication #:	US20160343861	Pub Dt:	11/24/2016
Title:	STRUCTURE AND PROCESS TO TUCK FIN TIPS SELF-ALIGNED TO GATES

Patent #:	9287135	Issue Dt:	03/15/2016	Application #:	14721430	Filing Dt:	05/26/2015
Title:	SIDEWALL IMAGE TRANSFER PROCESS FOR FIN PATTERNING

Patent #:	9437502	Issue Dt:	09/06/2016	Application #:	14738316	Filing Dt:	06/12/2015
Title:	METHOD TO FORM STACKED GERMANIUM NANOWIRES AND STACKED III-V NANOWIRES

Patent #:	9601378	Issue Dt:	03/21/2017	Application #:	14739008	Filing Dt:	06/15/2015
Publication #:	US20160365286	Pub Dt:	12/15/2016
Title:	SEMICONDUCTOR FINS FOR FINFET DEVICES AND SIDEWALL IMAGE TRANSFER (SIT) PROCESSES FOR MANUFACTURING THE SAME

Patent #:	9536791	Issue Dt:	01/03/2017	Application #:	14748424	Filing Dt:	06/24/2015
Publication #:	US20160293493	Pub Dt:	10/06/2016
Title:	STABLE MULTIPLE THRESHOLD VOLTAGE DEVICES ON REPLACEMENT METAL GATE CMOS DEVICES

Patent #:	9537090	Issue Dt:	01/03/2017	Application #:	14749770	Filing Dt:	06/25/2015
Publication #:	US20160380188	Pub Dt:	12/29/2016
Title:	PERPENDICULAR MAGNETIC ANISOTROPY FREE LAYERS WITH IRON INSERTION AND OXIDE INTERFACES FOR SPIN TRANSFER TORQUE MAGNETIC RANDOM ACCESS MEMORY

Patent #:	9728450	Issue Dt:	08/08/2017	Application #:	14749788	Filing Dt:	06/25/2015
Publication #:	US20160379876	Pub Dt:	12/29/2016
Title:	INSULATING A VIA IN A SEMICONDUCTOR SUBSTRATE

Patent #:	9786550	Issue Dt:	10/10/2017	Application #:	14749811	Filing Dt:	06/25/2015
Publication #:	US20160379869	Pub Dt:	12/29/2016
Title:	LOW RESISTANCE METAL CONTACTS TO INTERCONNECTS

Patent #:	9685507	Issue Dt:	06/20/2017	Application #:	14750013	Filing Dt:	06/25/2015
Publication #:	US20160379892	Pub Dt:	12/29/2016
Title:	FINFET DEVICES

Patent #:	9418934	Issue Dt:	08/16/2016	Application #:	14754999	Filing Dt:	06/30/2015
Title:	STRUCTURE AND FABRICATION METHOD FOR ELECTROMIGRATION IMMORTAL NANOSCALE INTERCONNECTS

Patent #:	9647062	Issue Dt:	05/09/2017	Application #:	14805669	Filing Dt:	07/22/2015
Publication #:	US20150364544	Pub Dt:	12/17/2015
Title:	SILICON NANOWIRE FORMATION IN REPLACEMENT METAL GATE PROCESS

Patent #:	9691656	Issue Dt:	06/27/2017	Application #:	14817868	Filing Dt:	08/04/2015
Publication #:	US20150340323	Pub Dt:	11/26/2015
Title:	SELF-FORMING EMBEDDED DIFFUSION BARRIERS

Patent #:	9437499	Issue Dt:	09/06/2016	Application #:	14830829	Filing Dt:	08/20/2015
Publication #:	US20150357246	Pub Dt:	12/10/2015
Title:	SEMICONDUCTOR DEVICE INCLUDING MERGED-UNMERGED WORK FUNCTION METAL AND VARIABLE FIN PITCH

Patent #:	9613851	Issue Dt:	04/04/2017	Application #:	14846800	Filing Dt:	09/06/2015
Publication #:	US20160027686	Pub Dt:	01/28/2016
Title:	METHOD FOR MANUFACTURING INTERCONNECT STRUCTURES INCORPORATING AIR GAP SPACERS

Patent #:	9673087	Issue Dt:	06/06/2017	Application #:	14846801	Filing Dt:	09/06/2015
Publication #:	US20160197002	Pub Dt:	07/07/2016
Title:	INTERCONNECT STRUCTURES INCORPORATING AIR-GAP SPACERS

Patent #:	10177240	Issue Dt:	01/08/2019	Application #:	14858628	Filing Dt:	09/18/2015
Publication #:	US20170084463	Pub Dt:	03/23/2017
Title:	FINFET DEVICE FORMED BY A REPLACEMENT METAL-GATE METHOD INCLUDING A GATE CUT-LAST STEP

Patent #:	9583624	Issue Dt:	02/28/2017	Application #:	14865276	Filing Dt:	09/25/2015
Title:	ASYMMETRIC FINFET MEMORY ACCESS TRANSISTOR

Patent #:	9653359	Issue Dt:	05/16/2017	Application #:	14869066	Filing Dt:	09/29/2015
Publication #:	US20170092544	Pub Dt:	03/30/2017
Title:	BULK FIN STI FORMATION

Patent #:	10038053	Issue Dt:	07/31/2018	Application #:	14880362	Filing Dt:	10/12/2015
Publication #:	US20170104060	Pub Dt:	04/13/2017
Title:	METHODS FOR REMOVAL OF SELECTED NANOWIRES IN STACKED GATE ALL AROUND ARCHITECTURE

Patent #:	9601371	Issue Dt:	03/21/2017	Application #:	14882568	Filing Dt:	10/14/2015
Publication #:	US20160056112	Pub Dt:	02/25/2016
Title:	INTERCONNECT STRUCTURE WITH BARRIER LAYER

Patent #:	9613853	Issue Dt:	04/04/2017	Application #:	14883162	Filing Dt:	10/14/2015
Publication #:	US20160035621	Pub Dt:	02/04/2016
Title:	COPPER WIRE AND DIELECTRIC WITH AIR GAPS

Patent #:	9391175	Issue Dt:	07/12/2016	Application #:	14883882	Filing Dt:	10/15/2015
Publication #:	US20160035864	Pub Dt:	02/04/2016
Title:	FIN END SPACER FOR PREVENTING MERGER OF RAISED ACTIVE REGIONS

Patent #:	9601380	Issue Dt:	03/21/2017	Application #:	14883913	Filing Dt:	10/15/2015
Publication #:	US20160035875	Pub Dt:	02/04/2016
Title:	FIN END SPACER FOR PREVENTING MERGER OF RAISED ACTIVE REGIONS

Patent #:	9515168	Issue Dt:	12/06/2016	Application #:	14884045	Filing Dt:	10/15/2015
Publication #:	US20160035876	Pub Dt:	02/04/2016
Title:	FIN END SPACER FOR PREVENTING MERGER OF RAISED ACTIVE REGIONS

Patent #:	10304773	Issue Dt:	05/28/2019	Application #:	14919143	Filing Dt:	10/21/2015
Publication #:	US20170117225	Pub Dt:	04/27/2017
Title:	LOW RESISTANCE CONTACT STRUCTURES INCLUDING A COPPER FILL FOR TRENCH STRUCTURES

Patent #:	9960240	Issue Dt:	05/01/2018	Application #:	14919201	Filing Dt:	10/21/2015
Publication #:	US20170117371	Pub Dt:	04/27/2017
Title:	LOW RESISTANCE CONTACT STRUCTURES FOR TRENCH STRUCTURES

Patent #:	9741792	Issue Dt:	08/22/2017	Application #:	14919451	Filing Dt:	10/21/2015
Publication #:	US20170117359	Pub Dt:	04/27/2017
Title:	Bulk Nanosheet with Dielectric Isolation

Patent #:	9443854	Issue Dt:	09/13/2016	Application #:	14920938	Filing Dt:	10/23/2015
Publication #:	US20160043082	Pub Dt:	02/11/2016
Title:	FINFET WITH CONSTRAINED SOURCE-DRAIN EPITAXIAL REGION

Patent #:	9722052	Issue Dt:	08/01/2017	Application #:	14924162	Filing Dt:	10/27/2015
Publication #:	US20170117382	Pub Dt:	04/27/2017
Title:	FIN CUT WITHOUT RESIDUAL FIN DEFECTS

100

Patent #:	9362355	Issue Dt:	06/07/2016	Application #:	14940685	Filing Dt:	11/13/2015
Title:	NANOSHEET MOSFET WITH FULL-HEIGHT AIR-GAP SPACER

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

12/27/2019

Assignee

TESSERA, INC.

3025 ORCHARD PARKWAY

SAN JOSE, CALIFORNIA 95134

Correspondence name and address
	TESSERA, INC.
	3025 ORCHARD PARKWAY
	SAN JOSE, CA 95134

Search Results as of: 05/29/2024 10:31 AM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6