Patent Assignment Details
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| Reel/Frame: | 027960/0568 | |
| Pages: | 11 |
| | Recorded: | 03/30/2012 | | |
| Conveyance: | RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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10544413
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Filing Dt:
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08/03/2005
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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METHOD OF MANUFACTURING MOS TRANSISTORS WITH GATE ELECTRODES FORMED IN A PACKET OF METAL LAYERS DEPOSITED UPON ONE ANOTHER
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Assignee
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| HIGH TECH CAMPUS 60 |
| EINDHOVEN, NETHERLANDS 5656 AG |
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Correspondence name and address
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DAVID L. SCHAEFFER
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411 EAST PLUMERIA DRIVE, MS41
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NXP SEMICONDUCTORS, IP&L
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SAN JOSE, CA 95134
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