Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 020120/0599 | |
| Pages: | 9 |
| | Recorded: | 11/15/2007 | | |
| Attorney Dkt #: | 07-391-A & 07-393-A |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
2
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2009
|
Application #:
|
10965602
|
Filing Dt:
|
10/13/2004
|
|
Title:
|
METHOD AND CIRCUIT FOR INCREASING THE MEMORY ACCESS SPEED OF AN ENHANCED SYNCHRONOUS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11238182
|
Filing Dt:
|
09/27/2005
|
|
Title:
|
METHOD FOR HIDING A REFRESH IN A PSEUDO-STATIC MEMORY WITH PLURAL DRAM SUB-ARRAYS AND AN ON-BOARD ADDRESS DECODER
|
|
|
Assignee
|
|
|
|
|
| 171 MAIN STREET |
| #271 |
| LOS ALTOS, CALIFORNIA 94022 |
|
|
Correspondence name and address
|
| |
MCDONNELL BOEHNEN HULBERT & BERGHOFF LLP
|
| |
300 S. WACKER DRIVE, SUITE 3100
|
| |
ROBERT J. IRVINE III
|
| |
CHICAGO, IL 60606
|
Search Results as of:
09/25/2024 07:11 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
