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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:009866/0602   Pages: 6
Recorded: 04/02/1999
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 19
1
Patent #:
Issue Dt:
10/31/1989
Application #:
06943565
Filing Dt:
12/18/1986
Title:
COMMUNICATIONS MANAGEMENT SYSTEM
2
Patent #:
Issue Dt:
12/01/1998
Application #:
07877317
Filing Dt:
05/01/1992
Title:
MULTI-PORT DIGITAL SIGNAL PROCESSOR HAVING INTERGRATED DATA FLOW CONTROL MEANS
3
Patent #:
Issue Dt:
09/05/1995
Application #:
07882645
Filing Dt:
05/13/1992
Title:
ADDRESS GENERATOR FOR MULTI-CHANNEL CIRCULAR-BUFFER STYLE PROCESSING
4
Patent #:
Issue Dt:
03/22/1994
Application #:
07894368
Filing Dt:
06/04/1992
Title:
CMOS CIRCUIT WITH CROWBAR LIMITING FUNCTION
5
Patent #:
Issue Dt:
05/17/1994
Application #:
08027934
Filing Dt:
03/08/1993
Title:
APPARATUS AND METHOD FOR PREVENTING I/0 BANDWIDTH LIMITATIONS IN FAST FOURIER TRANSFORM PROCESSORS
6
Patent #:
Issue Dt:
06/21/1994
Application #:
08044958
Filing Dt:
04/08/1993
Title:
METHOD AND APPARATUS FOR REPAIR OF MEMORY BY REDUNDANCY
7
Patent #:
Issue Dt:
12/05/1995
Application #:
08117959
Filing Dt:
09/08/1993
Title:
DIGIT REVERSE FOR MIXED RADIX FFT
8
Patent #:
Issue Dt:
03/26/1996
Application #:
08223686
Filing Dt:
04/06/1994
Title:
METHOD AND APPARATUS FOR REPAIR OF MEMORY BY REDUNDANCY
9
Patent #:
Issue Dt:
04/09/1996
Application #:
08268170
Filing Dt:
06/29/1994
Title:
PREDICTIVE STATUS FLAG GENERATION IN A FIRST-IN FIRST-OUT (FIFO) MEMORY DEVICE METHOD AND APPARATUS
10
Patent #:
Issue Dt:
09/03/1996
Application #:
08407385
Filing Dt:
03/17/1995
Title:
SHIELDED LOW NOISE MULTI-LEAD CONTACT
11
Patent #:
Issue Dt:
10/21/1997
Application #:
08515645
Filing Dt:
08/16/1995
Title:
MULTIPLE REGISTER BANK SYSTEM FOR CONCURRENT I/O OPERATION IN A CPU DATAPATH
12
Patent #:
Issue Dt:
11/11/1997
Application #:
08621010
Filing Dt:
03/22/1996
Title:
MULTI-MODE CACHE STRUCTURE
13
Patent #:
Issue Dt:
11/03/1998
Application #:
08621118
Filing Dt:
03/22/1996
Title:
SYSTEM AND METHOD FOR SELECTING A SIGNAL SOURCE TO TRIGGER A MICROPROCESSOR COUNTER/TIMER MACRO CELL
14
Patent #:
Issue Dt:
10/20/1998
Application #:
08932151
Filing Dt:
09/17/1997
Title:
TESTING AND DIAGNOSTIC MECHANISM
15
Patent #:
Issue Dt:
12/22/1998
Application #:
08946807
Filing Dt:
10/08/1997
Title:
CELLULAR TELEPHONE AUDIO INPUT COMPENSATION SYSTEM AND METHOD
16
Patent #:
Issue Dt:
02/22/2000
Application #:
08954541
Filing Dt:
10/20/1997
Title:
DATA PROCESSING SYSTEM USING A SHARED REGISTER BANK AND A PLURALITY OF PROCESSORS
17
Patent #:
Issue Dt:
12/18/2001
Application #:
09143148
Filing Dt:
08/28/1998
Title:
SYSTEM ON CHIP (SOC) FOUR-WAY SWITCH CROSSBAR SYSTEM AND METHOD
18
Patent #:
Issue Dt:
10/16/2001
Application #:
09151939
Filing Dt:
09/11/1998
Title:
FFT-BASED PARALLEL SYSTEM FOR ARRAY PROCESSING WITH LOW LATENCY
19
Patent #:
Issue Dt:
04/18/2000
Application #:
09151942
Filing Dt:
09/11/1998
Title:
CONSTANT IMPEDANCE, LOW NOISE CMOS BUFFER
Assignor
1
Exec Dt:
03/30/1999
Assignee
1
SHARP PLAZA
MAHWAH, NEW JERSEY 07430
Correspondence name and address
SHARP LABORATORIES OF AMERICA, INC.
DAVID C. RIPMA, PATENT COUNSEL
5750 N.W. PACIFIC RIM BLVD.
CAMAS, WA 98607

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