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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:044886/0608   Pages: 104
Recorded: 12/17/2017
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1095
Page 11 of 11
Pages: 1 2 3 4 5 6 7 8 9 10 11
1
Patent #:
Issue Dt:
01/05/2010
Application #:
11237095
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
03/29/2007
Title:
INTEGRATED CIRCUIT WITH DEPLETION MODE JFET
2
Patent #:
Issue Dt:
11/06/2007
Application #:
11237410
Filing Dt:
09/28/2005
Title:
CALIBRATION STANDARD FOR TRANSMISSION ELECTRON MICROSCOPY
3
Patent #:
Issue Dt:
07/08/2008
Application #:
11248509
Filing Dt:
10/12/2005
Publication #:
Pub Dt:
06/15/2006
Title:
APPARATUS TO PASSIVATE INDUCTIVELY OR CAPACITIVELY COUPLED SURFACE CURRENTS UNDER CAPACITOR STRUCTURES
4
Patent #:
Issue Dt:
09/01/2009
Application #:
11258253
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
02/16/2006
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
5
Patent #:
Issue Dt:
11/17/2009
Application #:
11262173
Filing Dt:
10/28/2005
Title:
SHALLOW TRENCH ISOLATION STRUCTURE WITH LOW TRENCH PARASITIC CAPACITANCE
6
Patent #:
Issue Dt:
08/04/2009
Application #:
11265040
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
05/03/2007
Title:
METHOD OF DESIGN BASED PROCESS CONTROL OPTIMIZATION
7
Patent #:
Issue Dt:
12/22/2009
Application #:
11265062
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
INTERDIGITADED CAPACITORS
8
Patent #:
Issue Dt:
02/05/2008
Application #:
11266133
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
05/03/2007
Title:
MULTI-SURFACED PLATE-TO-PLATE CAPACITOR AND METHOD OF FORMING SAME
9
Patent #:
Issue Dt:
02/19/2008
Application #:
11273857
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
05/17/2007
Title:
EMBEDDED TEST CIRCUITRY AND A METHOD FOR TESTING A SEMICONDUCTOR DEVICE FOR BREAKDOWN, WEAROUT OR FAILURE
10
Patent #:
Issue Dt:
10/14/2008
Application #:
11323398
Filing Dt:
12/29/2005
Publication #:
Pub Dt:
11/08/2007
Title:
METHOD AND APPARATUS FOR DIVERTING VOID DIFFUSION IN INTEGRATED CIRCUIT CONDUCTORS
11
Patent #:
Issue Dt:
05/22/2007
Application #:
11337460
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
06/08/2006
Title:
PLANARIZATION WITH REDUCED DISHING
12
Patent #:
Issue Dt:
03/11/2008
Application #:
11339540
Filing Dt:
01/26/2006
Publication #:
Pub Dt:
06/15/2006
Title:
CROSS-FILL PATTERN FOR METAL FILL LEVELS, POWER SUPPLY FILTERING, AND ANALOG CIRCUIT SHIELDING
13
Patent #:
Issue Dt:
02/26/2008
Application #:
11348597
Filing Dt:
02/07/2006
Publication #:
Pub Dt:
06/15/2006
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING IMPROVED PERFORMANCE AND RELIABILITY
14
Patent #:
NONE
Issue Dt:
Application #:
11381409
Filing Dt:
05/03/2006
Publication #:
Pub Dt:
08/24/2006
Title:
Adjustable Transmission Phase Shift Mask
15
Patent #:
Issue Dt:
12/02/2008
Application #:
11383171
Filing Dt:
05/12/2006
Publication #:
Pub Dt:
08/31/2006
Title:
APPARATUS FOR WAFER PATTERNING TO REDUCE EDGE EXCLUSION ZONE
16
Patent #:
Issue Dt:
07/21/2009
Application #:
11383670
Filing Dt:
05/16/2006
Publication #:
Pub Dt:
11/22/2007
Title:
INTEGRATED CIRCUIT WITH A TRENCH CAPACITOR STRUCTURE AND METHOD OF MANUFACTURE
17
Patent #:
Issue Dt:
10/16/2007
Application #:
11385156
Filing Dt:
03/21/2006
Publication #:
Pub Dt:
07/27/2006
Title:
PHASE-SHIFTING MASK AND SEMICONDUCTOR DEVICE
18
Patent #:
NONE
Issue Dt:
Application #:
11390015
Filing Dt:
03/27/2006
Publication #:
Pub Dt:
07/27/2006
Title:
Vertical replacement-gate junction field-effect transistor
19
Patent #:
Issue Dt:
04/10/2007
Application #:
11403137
Filing Dt:
04/11/2006
Publication #:
Pub Dt:
08/17/2006
Title:
WAFER CHUCKING APPARATUS FOR SPIN PROCESSOR
20
Patent #:
Issue Dt:
06/17/2008
Application #:
11403750
Filing Dt:
04/13/2006
Publication #:
Pub Dt:
08/31/2006
Title:
TEST SEMICONDUCTOR DEVICE AND METHOD FOR DETERMINING JOULE HEATING EFFECTS IN SUCH A DEVICE
21
Patent #:
Issue Dt:
07/01/2008
Application #:
11418873
Filing Dt:
05/04/2006
Publication #:
Pub Dt:
09/14/2006
Title:
DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
22
Patent #:
Issue Dt:
06/03/2008
Application #:
11419252
Filing Dt:
05/19/2006
Publication #:
Pub Dt:
05/17/2007
Title:
A METHOD OF FORMING A SPIRAL INDUCTOR IN A SEMICONDUCTOR SUBSTRATE
23
Patent #:
Issue Dt:
08/21/2007
Application #:
11419356
Filing Dt:
05/19/2006
Publication #:
Pub Dt:
05/17/2007
Title:
A VERTICAL REPLACEMENT-GATE SILICON-ON-INSULATOR TRANSISTOR
24
Patent #:
Issue Dt:
08/21/2007
Application #:
11419548
Filing Dt:
05/22/2006
Title:
INTERCONNECT DIELECTRIC TUNING
25
Patent #:
Issue Dt:
01/03/2012
Application #:
11425295
Filing Dt:
06/20/2006
Publication #:
Pub Dt:
12/20/2007
Title:
SEMICONDUCTOR DEVICE AND PROCESS FOR REDUCING DAMAGING BREAKDOWN IN GATE DIELECTRICS
26
Patent #:
Issue Dt:
07/19/2011
Application #:
11427494
Filing Dt:
06/29/2006
Publication #:
Pub Dt:
01/17/2008
Title:
METHOD TO IMPROVE METAL DEFECTS IN SEMICONDUCTOR DEVICE FABRICATION
27
Patent #:
Issue Dt:
10/20/2009
Application #:
11438493
Filing Dt:
05/22/2006
Publication #:
Pub Dt:
01/04/2007
Title:
SELECTIVE LASER ANNEALING OF SEMICONDUCTOR MATERIAL
28
Patent #:
Issue Dt:
11/11/2008
Application #:
11458270
Filing Dt:
07/18/2006
Publication #:
Pub Dt:
11/09/2006
Title:
METHOD FOR FORMING MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS
29
Patent #:
Issue Dt:
11/20/2007
Application #:
11473627
Filing Dt:
06/22/2006
Publication #:
Pub Dt:
10/26/2006
Title:
OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS
30
Patent #:
Issue Dt:
11/25/2008
Application #:
11506659
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
12/14/2006
Title:
TECHNIQUES FOR FORMING PASSIVE DEVICES DURING SEMICONDUCTOR BACK-END PROCESSING
31
Patent #:
Issue Dt:
06/16/2009
Application #:
11519614
Filing Dt:
09/12/2006
Publication #:
Pub Dt:
01/11/2007
Title:
DEFECT IDENTIFICATION SYSTEM AND METHOD FOR REPAIRING KILLER DEFECTS IN SEMICONDUCTOR DEVICES
32
Patent #:
Issue Dt:
09/02/2008
Application #:
11527108
Filing Dt:
09/25/2006
Publication #:
Pub Dt:
01/18/2007
Title:
FAILURE ANALYSIS VEHICLE FOR YIELD ENHANCEMENT WITH SELF TEST AT SPEED BURNIN CAPABILITY FOR RELIABILITY TESTING
33
Patent #:
Issue Dt:
11/01/2011
Application #:
11533785
Filing Dt:
09/21/2006
Publication #:
Pub Dt:
03/27/2008
Title:
BIPOLAR DEVICE HAVING BURIED CONTACTS
34
Patent #:
Issue Dt:
12/07/2010
Application #:
11535501
Filing Dt:
09/27/2006
Publication #:
Pub Dt:
03/27/2008
Title:
DIFFERENTIAL INDUCTOR FOR USE IN INTEGRATED CIRCUITS
35
Patent #:
Issue Dt:
07/03/2007
Application #:
11540056
Filing Dt:
09/29/2006
Publication #:
Pub Dt:
02/01/2007
Title:
METHOD OF ELECTRICAL TESTING OF AN INTERGRATED CIRCUIT WITH AN ELECTRICAL PROBE
36
Patent #:
Issue Dt:
02/19/2008
Application #:
11542864
Filing Dt:
10/04/2006
Publication #:
Pub Dt:
02/01/2007
Title:
PROTRUDING SPACERS FOR SELF-ALIGNED CONTACTS
37
Patent #:
Issue Dt:
05/26/2009
Application #:
11641507
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
05/03/2007
Title:
III-V POWER FIELD EFFECT TRANSISTORS
38
Patent #:
Issue Dt:
06/01/2010
Application #:
11649015
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
10/04/2007
Title:
FORMATION OF AN INTEGRATED CIRCUIT STRUCTURE WITH REDUCED DISHING IN METALLIZATION LEVELS
39
Patent #:
Issue Dt:
03/02/2010
Application #:
11649197
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
12/20/2007
Title:
PROCESS FOR MAKING AN ON-CHIP VACUUM TUBE DEVICE
40
Patent #:
Issue Dt:
09/30/2008
Application #:
11670031
Filing Dt:
02/01/2007
Publication #:
Pub Dt:
08/02/2007
Title:
FAILURE ANALYSIS AND TESTING OF SEMI-CONDUCTOR DEVICES USING INTELLIGENT SOFTWARE ON AUTOMATED TEST EQUIPMENT (ATE)
41
Patent #:
Issue Dt:
07/07/2009
Application #:
11673645
Filing Dt:
02/12/2007
Publication #:
Pub Dt:
08/14/2008
Title:
METHOD TO IMPROVE WRITER LEAKAGE IN A SIGE BIPOLAR DEVICE
42
Patent #:
Issue Dt:
09/28/2010
Application #:
11673714
Filing Dt:
02/12/2007
Publication #:
Pub Dt:
07/19/2007
Title:
SEMICONDUCTOR TEST DEVICE WITH HEATING CIRCUIT
43
Patent #:
NONE
Issue Dt:
Application #:
11695169
Filing Dt:
04/02/2007
Publication #:
Pub Dt:
07/19/2007
Title:
Planarization with reduced dishing
44
Patent #:
Issue Dt:
08/19/2008
Application #:
11733673
Filing Dt:
04/10/2007
Publication #:
Pub Dt:
08/02/2007
Title:
MULTI-STEP PROCESS FOR FORMING A BARRIER FILM FOR USE IN COPPER LAYER FORMATION
45
Patent #:
Issue Dt:
06/01/2010
Application #:
11736402
Filing Dt:
04/17/2007
Publication #:
Pub Dt:
08/16/2007
Title:
DIELECTRIC BARRIER LAYER FOR INCREASING ELECTROMIGRATION LIFETIMES IN COPPER INTERCONNECT STRUCTURES
46
Patent #:
Issue Dt:
11/02/2010
Application #:
11741195
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
01/24/2008
Title:
HYBRID BUMP CAPACITOR
47
Patent #:
Issue Dt:
08/05/2008
Application #:
11748569
Filing Dt:
05/15/2007
Publication #:
Pub Dt:
09/13/2007
Title:
GUARD RING FOR IMPROVED MATCHING
48
Patent #:
Issue Dt:
06/15/2010
Application #:
11769486
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
10/25/2007
Title:
OPTIMIZED MIRROR DESIGN FOR OPTICAL DIRECT WRITE
49
Patent #:
Issue Dt:
12/15/2009
Application #:
11809686
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
10/04/2007
Title:
STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
50
Patent #:
Issue Dt:
02/17/2009
Application #:
11809873
Filing Dt:
06/01/2007
Publication #:
Pub Dt:
10/11/2007
Title:
FABRICATION METHOD
51
Patent #:
Issue Dt:
09/21/2010
Application #:
11821396
Filing Dt:
06/22/2007
Publication #:
Pub Dt:
11/01/2007
Title:
INTEGRATED CIRCUIT WITH METAL SILICIDE REGIONS
52
Patent #:
Issue Dt:
12/15/2009
Application #:
11827807
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
11/29/2007
Title:
REAL-TIME GATE ETCH CRITICAL DIMENSION CONTROL BY OXYGEN MONITORING
53
Patent #:
Issue Dt:
10/26/2010
Application #:
11853417
Filing Dt:
09/11/2007
Publication #:
Pub Dt:
01/03/2008
Title:
CONTROL OF HOT CARRIER INJECTION IN A METAL-OXIDE SEMICONDUCTOR DEVICE
54
Patent #:
Issue Dt:
11/03/2009
Application #:
11856196
Filing Dt:
09/17/2007
Publication #:
Pub Dt:
03/13/2008
Title:
APPARATUS FOR CONFINING INDUCTIVELY COUPLED SURFACE CURRENTS
55
Patent #:
Issue Dt:
08/04/2009
Application #:
11872347
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
02/07/2008
Title:
SEMICONDUCTOR DEVICE WITH CONSTRICTED CURRENT PASSAGE
56
Patent #:
Issue Dt:
03/15/2011
Application #:
11926469
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
03/06/2008
Title:
SHALLOW TRENCH ISOLATION STRUCTURES AND A METHOD FOR FORMING SHALLOW TRENCH ISOLATION STRUCTURES
57
Patent #:
Issue Dt:
08/25/2009
Application #:
11927950
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/06/2008
Title:
DUAL-GATE METAL-OXIDE-SEMICONDUCTOR DEVICE
58
Patent #:
Issue Dt:
06/22/2010
Application #:
11927978
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/06/2008
Title:
SEMICONDUCTOR STRUCTURE FORMED USING A SACRIFICIAL STRUCTURE
59
Patent #:
Issue Dt:
07/14/2009
Application #:
11937199
Filing Dt:
11/08/2007
Publication #:
Pub Dt:
03/13/2008
Title:
VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
60
Patent #:
Issue Dt:
03/02/2010
Application #:
11939482
Filing Dt:
11/13/2007
Title:
METHOD OF TREATING METAL AND METAL SALTS TO ENABLE THIN LAYER DEPOSITION IN SEMICONDUCTOR PROCESSING
61
Patent #:
Issue Dt:
07/21/2009
Application #:
11964920
Filing Dt:
12/27/2007
Publication #:
Pub Dt:
07/03/2008
Title:
FAILURE ANALYSIS AND TESTING OF SEMI-CONDUCTOR DEVICES USING INTELLIGENT SOFTWARE ON AUTOMATED TEST EQUIPMENT (ATE)
62
Patent #:
NONE
Issue Dt:
Application #:
12021728
Filing Dt:
01/29/2008
Publication #:
Pub Dt:
06/26/2008
Title:
DAMASCENE REPLACEMENT METAL GATE PROCESS WITH CONTROLLED GATE PROFILE AND LENGTH USING Si1-xGex AS SACRIFICIAL MATERIAL
63
Patent #:
NONE
Issue Dt:
Application #:
12034750
Filing Dt:
02/21/2008
Publication #:
Pub Dt:
06/12/2008
Title:
Substrate Laser Marking
64
Patent #:
NONE
Issue Dt:
Application #:
12114589
Filing Dt:
05/02/2008
Publication #:
Pub Dt:
11/13/2008
Title:
TRANSISTOR FABRICATION METHOD
65
Patent #:
Issue Dt:
04/19/2011
Application #:
12117379
Filing Dt:
05/08/2008
Publication #:
Pub Dt:
09/04/2008
Title:
YIELD PROFILE MANIPULATOR
66
Patent #:
Issue Dt:
01/12/2010
Application #:
12191171
Filing Dt:
08/13/2008
Publication #:
Pub Dt:
12/11/2008
Title:
METHODS AND STRUCTURE FOR FORMING COPPER BARRIER LAYERS INTEGRAL WITH SEMICONDUCTOR SUBSTRATES STRUCTURES
67
Patent #:
Issue Dt:
05/11/2010
Application #:
12243137
Filing Dt:
10/01/2008
Publication #:
Pub Dt:
01/29/2009
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
68
Patent #:
Issue Dt:
06/14/2011
Application #:
12253403
Filing Dt:
10/17/2008
Publication #:
Pub Dt:
02/12/2009
Title:
ELECTRICAL DEVICES HAVING ADJUSTABLE CAPACITANCE
69
Patent #:
Issue Dt:
04/20/2010
Application #:
12319603
Filing Dt:
01/09/2009
Publication #:
Pub Dt:
05/21/2009
Title:
METHOD OF FABRICATING A VERTICAL TRANSISTOR AND CAPACITOR
70
Patent #:
Issue Dt:
04/16/2013
Application #:
12339407
Filing Dt:
12/19/2008
Publication #:
Pub Dt:
06/24/2010
Title:
FILL PATTERNING FOR SYMMETRICAL CIRCUITS
71
Patent #:
Issue Dt:
03/01/2011
Application #:
12476994
Filing Dt:
06/02/2009
Publication #:
Pub Dt:
09/24/2009
Title:
METHOD TO IMPROVE WRITER LEAKAGE IN SIGE BIPOLAR DEVICE
72
Patent #:
Issue Dt:
01/17/2012
Application #:
12502057
Filing Dt:
07/13/2009
Publication #:
Pub Dt:
11/05/2009
Title:
METHOD FOR ABATING EFFLUENT FROM AN ETCHING PROCESS
73
Patent #:
Issue Dt:
05/24/2011
Application #:
12506746
Filing Dt:
07/21/2009
Publication #:
Pub Dt:
12/03/2009
Title:
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
74
Patent #:
Issue Dt:
03/27/2012
Application #:
12516301
Filing Dt:
05/26/2009
Publication #:
Pub Dt:
12/16/2010
Title:
INTEGRATED CIRCUIT INDUCTORS WITH REDUCED MAGNETIC COUPLING
75
Patent #:
Issue Dt:
04/12/2011
Application #:
12523368
Filing Dt:
07/16/2009
Publication #:
Pub Dt:
03/18/2010
Title:
METHOD TO REDUCE COLLECTOR RESISTANCE OF A BIPOLAR TRANSISTOR AND INTEGRATION INTO A STANDARD CMOS FLOW
76
Patent #:
Issue Dt:
04/19/2011
Application #:
12555082
Filing Dt:
09/08/2009
Publication #:
Pub Dt:
12/31/2009
Title:
METHOD OF MANUFACTURING A LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
77
Patent #:
Issue Dt:
09/20/2011
Application #:
12574426
Filing Dt:
10/06/2009
Title:
METHOD CHARACTERIZING MATERIALS FOR A TRENCH ISOLATION STRUCTURE HAVING LOW TRENCH PARASITIC CAPACITANCE
78
Patent #:
Issue Dt:
06/07/2011
Application #:
12574479
Filing Dt:
10/06/2009
Publication #:
Pub Dt:
01/28/2010
Title:
BI-AXIAL TEXTURING OF HIGH-K DIELECTRIC FILMS TO REDUCE LEAKAGE CURRENTS
79
Patent #:
Issue Dt:
03/22/2011
Application #:
12610733
Filing Dt:
11/02/2009
Publication #:
Pub Dt:
02/25/2010
Title:
STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
80
Patent #:
Issue Dt:
10/18/2011
Application #:
12616050
Filing Dt:
11/10/2009
Publication #:
Pub Dt:
03/11/2010
Title:
INTERDIGITATED CAPACITORS
81
Patent #:
Issue Dt:
02/21/2012
Application #:
12618936
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
09/02/2010
Title:
METHOD FOR SEPARATING A SEMICONDUCTOR WAFER INTO INDIVIDUAL SEMICONDUCTOR DIES USING AN IMPLANTED IMPURITY
82
Patent #:
Issue Dt:
10/04/2011
Application #:
12689749
Filing Dt:
01/19/2010
Publication #:
Pub Dt:
05/13/2010
Title:
TRANSISTOR FABRICATION METHOD
83
Patent #:
Issue Dt:
03/22/2011
Application #:
12727304
Filing Dt:
03/19/2010
Publication #:
Pub Dt:
07/08/2010
Title:
MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING
84
Patent #:
Issue Dt:
08/14/2012
Application #:
12741839
Filing Dt:
07/08/2010
Publication #:
Pub Dt:
10/28/2010
Title:
CHIP IDENTIFICATION USING TOP METAL LAYER
85
Patent #:
Issue Dt:
10/25/2011
Application #:
12764004
Filing Dt:
04/20/2010
Publication #:
Pub Dt:
08/12/2010
Title:
DIELECTRIC BARRIER LAYER FOR INCREASING ELECTROMIGRATION LIFETIMES IN COPPER INTERCONNECT STRUCTURES
86
Patent #:
Issue Dt:
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Assignors
1
Exec Dt:
12/08/2017
2
Exec Dt:
12/08/2017
Assignee
1
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, ILLINOIS 60611
Correspondence name and address
CHAD S. HILYARD
401 N. MICHIGAN AVE.
SUITE 1600
CHICAGO, IL 60611

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