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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09138741
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Filing Dt:
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08/24/1998
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Title:
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METHOD FOR CONTROLLED IMPLANTATION OF ELEMENTS INTO THE SURFACE OR NEAR SURFACE OF A SUBSTRATE
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09140276
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Filing Dt:
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08/26/1998
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Publication #:
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Pub Dt:
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11/29/2001
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Title:
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METHOD FOR FORMING DUAL-POLYSILICON STRUCTURES USING A BUILT- IN STOP LAYER
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09143274
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Filing Dt:
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08/28/1998
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Title:
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PROCESS FOR FABRICATING VERTICAL TRANSISTORS
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09150076
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Filing Dt:
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09/09/1998
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Title:
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ON-CHIP MISALIGNMENT INDICATION
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09152185
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Filing Dt:
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09/12/1998
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Title:
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ARTICLE COMPRISING A MULTI-PORT VARIABLE CAPACITOR
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09162407
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Filing Dt:
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09/29/1998
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Title:
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SEMICONDUCTOR DEVICE WITH A [AIR OF TRANSISTORS HAVING DUAL WORK FUNCTION GATE ELECTRODES
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09162542
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Filing Dt:
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09/29/1998
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Title:
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METHOD FOR FORMING A NITRIDE LAYER SUITABLE FOR USE IN ADVANCED GATE DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09163623
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Filing Dt:
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09/30/1998
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Title:
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REDUCTION OF SILICON DEFECT INDUCED FAILURES AS A RESULT OF IMPLANTS IN CMOS AND OTHER INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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09164069
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Filing Dt:
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09/30/1998
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Title:
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METHOD FOR COMPOSING A DIELECTRIC LAYER WITHIN AN INTERCONNECT STRUCTURE OF A MULTILAYER SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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04/04/2000
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Application #:
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09164283
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Filing Dt:
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10/01/1998
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Title:
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METHOD FOR REMOVING ETCHING RESIDUES AND CONTAMINANTS
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09166832
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Filing Dt:
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10/05/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING ALUMINUM CONTACTS OR VIAS AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09172456
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Filing Dt:
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10/14/1998
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Title:
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ETCH ENDPOINT DETECTION
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09174503
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Filing Dt:
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10/16/1998
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Title:
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PROCESS FOR FORMING INTEGRATED STRUCTURES USING THREE DIMENSIONAL PRINTING TECHNIQUES
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09177335
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Filing Dt:
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10/22/1998
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Title:
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METHOD AND APPARATUS FOR DETECTING A PLANARIZED OUTER LAYER OF A SEMICONDUCTOR WAFER WITH A CONFOCAL OPTICAL SYSTEM
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Patent #:
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Issue Dt:
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01/18/2000
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Application #:
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09190351
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Filing Dt:
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11/12/1998
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Title:
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PROCESS FOR DEVICE FABRICATION USING A VARIABLE TRANSMISSION APERTURE
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Patent #:
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Issue Dt:
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11/21/2000
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Application #:
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09196486
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Filing Dt:
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11/19/1998
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Title:
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ARTICLE COMPRISING FLUORINATED AMORPHOUS CARBON AND METHOD FOR FABRICATING ARTICLE
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09197412
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Filing Dt:
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11/21/1998
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Title:
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DETECTING TRACE LEVELS OF COPPER
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09204813
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Filing Dt:
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12/03/1998
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Title:
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APPARATUS AND METHOD FOR BLOCKING THE DEPOSITION OF OXIDE ON A WAFER
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09204815
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Filing Dt:
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12/03/1998
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Title:
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METHOD FOR FORMING AN ION IMPLANTED ELECTROSTATIC CHUCK
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09205413
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Filing Dt:
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12/02/1998
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Title:
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LOCOS ISOLATION PROCESS USING A LAYERED PAD NITRIDE AND DRY FIELD OXIDATION STACK AND SEMICONDUCTOR DEVICE EMPLOYING THE SAME
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09205414
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Filing Dt:
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12/02/1998
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Title:
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PROCESS FOR FORMING METAL OXIDE SEMICONDUCTORS INCLUDING AN IN SITU FURNACE GATE STACK WITH VARYING SILICON NITRIDE DEPOSITION RATE
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09205840
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Filing Dt:
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12/04/1998
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Title:
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ARTICLE COMPRISING FLUORINATED DIAMOND-LIKE CARBON AND METHOD FOR FABRICATING ARTICLE
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09207395
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Filing Dt:
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12/08/1998
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Title:
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NOVEL WELL FORMATION FOR CMOS DEVICES INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09209704
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Filing Dt:
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12/11/1998
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Title:
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APPARATUS AND METHOD OF DETECTING A POLISHING ENDPOINT LAYER OF A SEMICONDUCTOR WAFER WHICH INCLUDES A METALLIC REPORTING SUBSTANCE
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Patent #:
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Issue Dt:
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01/02/2001
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Application #:
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09211024
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Filing Dt:
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12/14/1998
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Title:
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SUBSONIC TO SUPERSONIC AND ULTRASONIC CONDITIONING OF A POLISHING PAD IN A CHEMICAL MECHANICAL POLISHING APPARATUS
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09211481
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Filing Dt:
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12/14/1998
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Title:
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METHOD AND SYSTEM FOR ANALYZING WAFER PROCESSING ORDER
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09212315
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Filing Dt:
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12/15/1998
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Title:
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IMPROVED DUAL GATE OXIDE PROCESS FOR DEEP SUBMICRON ICS
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Patent #:
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Issue Dt:
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12/11/2001
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Application #:
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09212450
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Filing Dt:
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12/16/1998
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Title:
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TUNGSTEN LOCAL INTERCONNECT FOR SILICON INTEGRATED CIRCUIT STRUCTURES, AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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09/12/2000
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Application #:
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09212503
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Filing Dt:
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12/15/1998
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Title:
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ENDPOINT DETECTION METHOD AND APPARATUS WHICH UTILIZE A CHELATING AGENT TO DETECT A POLISHING ENDPOINT
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Patent #:
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Issue Dt:
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11/13/2001
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Application #:
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09213803
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Filing Dt:
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12/17/1998
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Title:
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APPARATUS AND METHOD OF PLANARIZING A SEMICONDUCTOR WAFER THAT INCLUDES A FIRST REFLECTIVE SUBSTANCE AND A SECOND REFLECTIVE SUBSTANCE
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09218574
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Filing Dt:
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12/22/1998
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Title:
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MULTI-LAYERED TITANIUM NITRIDE BARRIER STRUCTURE
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09218649
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Filing Dt:
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12/22/1998
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Title:
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BARRIER FOR COPPER METALLIZATION
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09218780
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Filing Dt:
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12/22/1998
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Title:
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METHOD TO OBTAIN A LOW RESISTIVITY AND CONFORMITY CHEMICAL VAPOR DEPOSITION TITANIUM FILM
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09219655
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Filing Dt:
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12/23/1998
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Title:
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VERTICAL INTERDIGITATED METAL-INSULATOR-MATAL CAPACITOR FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09220417
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Filing Dt:
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12/24/1998
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Title:
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CHEMICAL-MECHANICAL POLISHING APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09221023
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Filing Dt:
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12/23/1998
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Title:
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METHOD OF FORMING AND ELECTRICALLY CONNECTING A VERTICAL INTERDIGITATED METAL-INSULATOR- METAL CAPACITOR EXTENDING BETWEEN INTERCONNECT LAYERS IN AN INTERGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/25/2000
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Application #:
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09222110
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Filing Dt:
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12/29/1998
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Title:
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LOW TEMPERATURE COEFFICIENT DIELECTRIC MATERIALS AND DEVICES COMPRISING SAME
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09223354
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Filing Dt:
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12/30/1998
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Title:
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N-PROFILE ENGINEERING AT THE POLY/GATE OXIDE AND GATE OXIDE/SI INTERFACES THROUGH NH3 ANNEALING OF A LAYERED POLY/A-SI STRUCTURE
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09231566
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Filing Dt:
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01/14/1999
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Title:
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ARTICLE COMPRISING ELECTRONIC CIRCUITS AND DEVICES WITH MAGNETICALLY PROGRAMMABLE ELECTRICAL RESISTANCE
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09233828
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Filing Dt:
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01/19/1999
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Title:
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MASK HAVING AN ARBITRARY COMPLEX TRANSMISSION FUNCTION
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09241458
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Filing Dt:
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02/02/1999
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Title:
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ARTICLE FOR DE-EMBEDDING PARASITICS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09243047
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Filing Dt:
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02/03/1999
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Title:
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FULLY ISOLATED THIN-FILM TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09244327
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Filing Dt:
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02/03/1999
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Title:
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FUNCTIONAL OBIC ANALYSIS
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09246402
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Filing Dt:
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02/08/1999
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Title:
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METHOD FOR FABRICATING A MERGED INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09250500
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Filing Dt:
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02/16/1999
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Title:
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CAPACITOR FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09250501
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Filing Dt:
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02/16/1999
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Title:
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METHOD OF MAKING A CAPACITOR
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09251702
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Filing Dt:
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02/17/1999
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Title:
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METHOD AND COMPOSITION FOR REDUCING GATE OXIDE DAMAGE DURING RF SPUTTER CLEAN
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09255845
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Filing Dt:
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02/23/1999
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Title:
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METHOD FOR MAKING INP HETEROSTRUCTURE DEVICES
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09259001
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Filing Dt:
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02/26/1999
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Title:
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SEMICONDUCTOR DEVICE STRUCTURE INCLUDING A TANTALUM PENTOXIDE LAYER SANDWICHED BETWEEN SILICON NITRIDE LAYERS
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09259028
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Filing Dt:
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02/26/1999
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Publication #:
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Pub Dt:
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03/07/2002
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Title:
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PROCESS FOR THE FABRICATION OF DUAL GATE STRUCTURES FOR CMOS DEVICES
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09261346
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Filing Dt:
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03/03/1999
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Title:
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PROCESS FOR FABRICATING IMPROVED IRON-COBALT MAGNETOSTRICTIVE ALLOY AND ARTICLE COMPRISING ALLOY
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09266174
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Filing Dt:
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03/10/1999
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Title:
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TOP SURFACE IMAGING TECHNIQUE USING A TOPCOAT DELIVERY SYSTEM
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Patent #:
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Issue Dt:
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11/13/2001
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Application #:
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09272732
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Filing Dt:
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12/14/1998
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Title:
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MEV IMPLANTATION TO FORM VERTICALLY MODULATED N+ BURIED LAYER IN AN NPN BIPOLAR TRANSISTOR
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09274254
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Filing Dt:
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03/22/1999
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Title:
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FORMATION OF IMPROVED LOW DIELECTRIC CONSTANT CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL BY REACTION OF CARBON-CONTAINING SILANE WITH OXIDIZING AGENT IN THE PRESENCE OF ONE OR MORE REACTION RETARDANTS
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09274457
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Filing Dt:
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03/22/1999
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Title:
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LOW DIELECTRIC CONSTANT MULTIPLE CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL FOR USE IN INTEGRATED CIRCUIT STRUCTURES, AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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01/02/2001
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Application #:
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09276034
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Filing Dt:
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03/25/1999
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Title:
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METHOD FOR CLEANING VIA OPENINGS IN INTEGRATED CIRCUIT MANUFACTURING
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09276912
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Filing Dt:
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03/27/1999
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Title:
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HYBRID INORGANIC-ORGANIC COMPOSITE FOR USE AS AN INTERLAYER DIELECTRIC
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09280103
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Filing Dt:
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03/29/1999
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Title:
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DEVICE COMPRISING N-CHANNEL SEMICONDUCTOR MATERIAL
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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09281514
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Filing Dt:
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03/29/1999
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Title:
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PROCESS FOR TREATING DAMAGED SURFACES OF LOW DIELECTRIC CONSTANT ORGANO SILICON OXIDE INSULATION MATERIAL TO INHIBIT MOISTURE ABSORPTION
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09281602
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Filing Dt:
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03/29/1999
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Title:
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PLASMA CLEANING PROCESS FOR OPENINGS FORMED IN AT LEAST ONE LOW DIELECTRIC CONSTANT INSULATION LAYER OVER COPPER METALLIZATION IN INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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09286929
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Filing Dt:
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04/06/1999
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Title:
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METHOD FOR PROCESSING SILICON WORKPIECES USING HYBRID OPTICAL THERMOMETER SYSTEM
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Patent #:
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Issue Dt:
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12/05/2000
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Application #:
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09289828
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Filing Dt:
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04/12/1999
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Title:
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CONSISTENT ALIGNMENT MARK PROFILES ON SEMICONDUCTOR WAFERS USING METAL ORGANIC CHEMICAL VAPOR DEPOSITION TITANIUM NITRIDE PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09292422
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Filing Dt:
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04/15/1999
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Title:
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DAMASCENE CAPACITORS FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09292860
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Filing Dt:
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04/16/1999
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Title:
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MICROMAGNETIC DEVICE HAVING AN ANISOTROPIC FERROMAGNETIC CORE AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09293103
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Filing Dt:
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04/16/1999
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Title:
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LITHOGRAPHIC PROCESS HAVING SUB-WAVELENGTH RESOLUTION
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09293510
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Filing Dt:
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04/15/1999
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Title:
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DIGITAL NOISE REDUCTION IN INTEGRATED CIRCUITS AND CIRCUIT ASSEMBLIES
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09298792
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Filing Dt:
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04/23/1999
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Title:
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METHOD OF PLANARIZING A SURFACE ON AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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09300823
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Filing Dt:
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04/27/1999
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Title:
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CATALYTIC ACCELERATION AND ELECTRICAL BIAS CONTROL OF CMP PROCESSING
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Patent #:
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Issue Dt:
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10/24/2000
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Application #:
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09302830
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Filing Dt:
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04/30/1999
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Title:
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METHOD AND ARRANGEMENT FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09302832
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Filing Dt:
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04/30/1999
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Title:
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METHOD AND APPARATUS FOR DEPOSITION OF POROUS SILICA DIELECTRICS
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09306287
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Filing Dt:
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05/06/1999
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Title:
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METHOD OF ELECTRON BEAM EXPOSURE UTILIZING EMITTER WITH CONDUCTIVE MESH GRID
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Patent #:
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Issue Dt:
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10/24/2000
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Application #:
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09311253
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Filing Dt:
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05/13/1999
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Title:
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SEMICONDUCTOR WAFER HAVING A LAYER-TO-LAYER ALIGNMENT MARK AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09317430
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Filing Dt:
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05/24/1999
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Title:
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USING FAST HOT-CARRIER AGING METHOD FOR MEASURING PLASMA CHARGING DAMAGE
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09321658
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Filing Dt:
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05/28/1999
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Title:
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ANTI-MICROBUBBLE DEPOSITION APPARATUS
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09321659
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Filing Dt:
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05/28/1999
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Title:
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ANTI-AIRLOCK APPARATUS FOR FILTERS
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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09322191
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Filing Dt:
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05/28/1999
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Title:
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LIQUID LEVEL SENSOR FOR BUFFERED HYDROFLUORIC ACID
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Patent #:
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Issue Dt:
|
02/12/2002
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Application #:
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09323607
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Filing Dt:
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06/01/1999
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Title:
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PROCESS FOR SYNTHESIZING A PALLADIUM REPLENISHER FOR ELECTROPLATING BATHS
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Patent #:
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Issue Dt:
|
04/02/2002
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Application #:
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09324946
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Filing Dt:
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06/03/1999
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Title:
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TUNGSTEN SILICIDE NITRIDE AS A BARRIER FOR HIGH TEMPERATURE ANNEALS TO IMPROVE HOT CARRIER RELIABILITY
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09327793
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Filing Dt:
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06/08/1999
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Title:
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METHOD OF REDUCING CARBON CONTAMINATION OF A THIN DIELECTRIC FILM BY USING GASEOUS ORGANIC PRECURSORS, INERT GAS, AND OZONE TO REACT WITH CARBON CONTAMINANTS
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09332061
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Filing Dt:
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06/14/1999
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Title:
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PROCESS FOR FABRICATING A PROJECTION ELECTRON LITHOGRAPHY MASK AND A REMOVABLE REUSABLE COVER FOR USE THEREIN
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09334491
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Filing Dt:
|
06/16/1999
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Title:
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PROCESS FOR FORMING A PLASMA NITRIDE FILM SUITABLE FOR GATE DIELECTRIC APPLICATION IN SUB-0.25 UM TECHNOLOGIES
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Patent #:
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Issue Dt:
|
03/06/2001
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Application #:
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09335707
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Filing Dt:
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06/18/1999
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Title:
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PROCESS FOR FABRICATING VERTICAL TRANSISTORS
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09337741
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Filing Dt:
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06/22/1999
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Title:
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BONDED ARTICLE HAVING IMPROVED CRYSTALLINE STRUCTURE AND WORK FUNCTION UNIFORMITY AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09337966
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Filing Dt:
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06/22/1999
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Title:
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SCANNING ELECTRON MICROSCOPE/ENERGY DISPERSIVE SPECTROSCOPY SAMPLE PREPARATION METHOD AND SAMPLE PRODUCED THEREBY
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Patent #:
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Issue Dt:
|
07/03/2001
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Application #:
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09338143
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Filing Dt:
|
06/22/1999
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Title:
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INTEGRATED CIRCUIT HAVING A MICROMAGNETIC DEVICE INCLUDING A FERROMAGNETIC CORE AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
|
09/05/2000
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Application #:
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09338735
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Filing Dt:
|
06/23/1999
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Title:
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METHOD OF MAKING A SEMICONDUCTOR WITH COPPER PASSIVATING FILM
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Patent #:
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Issue Dt:
|
08/28/2001
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Application #:
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09338939
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Filing Dt:
|
06/24/1999
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Title:
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SYSTEM AND METHOD FOR FORMING A UNIFORM THIN GATE OXIDE LAYER
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Patent #:
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Issue Dt:
|
06/06/2000
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Application #:
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09339085
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Filing Dt:
|
06/23/1999
|
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Title:
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METHOD OF PASSIVATING COPPER INTERCONNECTS IN A SEMICONDUCTOR
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Patent #:
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Issue Dt:
|
10/16/2001
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Application #:
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09339894
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Filing Dt:
|
06/25/1999
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Title:
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CHARGE INJECTION TRANSISTOR USING HIGH-K DIELECTRIC BARRIER LAYER
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Patent #:
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Issue Dt:
|
11/20/2001
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Application #:
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09339895
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Filing Dt:
|
06/25/1999
|
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Title:
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GATE STRUCTURE FOR INTEGRATED CIRCUIT FABRICATION
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Patent #:
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Issue Dt:
|
05/22/2001
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Application #:
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09340224
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Filing Dt:
|
06/25/1999
|
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Title:
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METHODS OF FABRICATING AN INTEGRATED CIRCUIT DEVICE WITH COMPOSITE OXIDE DIELECTRIC
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Patent #:
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Issue Dt:
|
02/19/2002
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Application #:
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09344056
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Filing Dt:
|
06/25/1999
|
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Title:
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MOBILE IONIC CONTAMINATION DETECTION IN MANUFACTURE OF SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
05/15/2001
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Application #:
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09346493
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Filing Dt:
|
06/30/1999
|
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Title:
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PROCESS TO PREVENT STRESS CRACKING OF DIELECTRIC FILMS ON SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
|
09/03/2002
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Application #:
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09349538
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Filing Dt:
|
07/08/1999
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Publication #:
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Pub Dt:
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01/31/2002
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Title:
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METHOD FOR FABRICATING BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
|
09/25/2001
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Application #:
|
09351971
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Filing Dt:
|
07/12/1999
|
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Title:
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METHOD OF MAKING DEVICES HAVING THIN DIELECTRIC LAYERS
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Patent #:
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Issue Dt:
|
06/26/2001
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Application #:
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09352674
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Filing Dt:
|
07/11/1999
|
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Title:
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METHOD FOR COATING AN ARTICLE WITH A LADDER SILOXANE POLYMER AND COATED ARTICLE
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Patent #:
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|
Issue Dt:
|
08/01/2000
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Application #:
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09353860
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Filing Dt:
|
07/15/1999
|
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Title:
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LOCATION OF DEFECTS USING DYE PENETRATION
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Patent #:
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Issue Dt:
|
02/06/2001
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Application #:
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09354711
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Filing Dt:
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07/16/1999
|
|
Title:
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ARTICLE COMPRISING A VARIABLE INDUCTOR
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Patent #:
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Issue Dt:
|
11/27/2001
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Application #:
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09354928
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Filing Dt:
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07/15/1999
|
|
Title:
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NANOSCALE CONDUCTIVE CONNECTORS AND METHOD FOR MAKING SAME
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|
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Patent #:
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|
Issue Dt:
|
05/09/2000
|
Application #:
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09361684
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Filing Dt:
|
07/27/1999
|
|
Title:
|
CONSISTENT ALIGNMENT MARK PROFILES ON SEMICONDUCTOR WAFERS USING FINE GRAIN TUNGSTEN PROTECTIVE LAYER
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