Total properties:
1095
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9
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11
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10295489
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Filing Dt:
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11/15/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Title:
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FEED FORWARD LEVELING
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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10300254
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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05/29/2003
| | | | |
Title:
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LDMOS DEVICE HAVING A TAPERED OXIDE
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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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10303280
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Filing Dt:
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11/25/2002
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Publication #:
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Pub Dt:
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06/12/2003
| | | | |
Title:
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SEMICONDUCTOR MANUFACTURING USING MODULAR SUBSTRATES
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10304631
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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04/24/2003
| | | | |
Title:
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METHOD OF REDUCING SILICONE OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBRID INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBRID CIRCUIT
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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10306011
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Filing Dt:
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11/26/2002
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Publication #:
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Pub Dt:
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06/19/2003
| | | | |
Title:
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METAL-INSULATOR-METAL CAPACITOR FORMED BY DAMASCENE PROCESSES BETWEEN METAL INTERCONNECT LAYERS AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10306067
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
Title:
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FIRST APPROXIMATION FOR OPC SIGNIFICANT SPEED-UP
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10307018
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Filing Dt:
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11/27/2002
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Publication #:
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Pub Dt:
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05/27/2004
| | | | |
Title:
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FAILURE ANALYSIS VEHICLE
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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10315480
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Filing Dt:
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12/09/2002
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Title:
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CONTAMINATION DISTRIBUTION APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10316386
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
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06/26/2003
| | | | |
Title:
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PROCESS FOR OXIDE FABRICATION USING OXIDATION STEPS BELOW AND ABOVE A THRESHOLD TEMPERATURE
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10317147
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
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09/18/2003
| | | | |
Title:
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METHOD OF VERIFYING IC MASK SETS
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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10321250
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Filing Dt:
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12/16/2002
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Title:
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SENICONDUCTOR WAFER ARRANGEMENT OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
|
09/06/2005
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Application #:
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10321938
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Filing Dt:
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12/16/2002
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Title:
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DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
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Patent #:
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|
Issue Dt:
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06/01/2004
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Application #:
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10324698
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Filing Dt:
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12/20/2002
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Title:
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METHOD FOR THE FORMATION OF ACTIVE AREA UTILIZING REVERSE TRENCH ISOLATION
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Patent #:
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Issue Dt:
|
03/15/2005
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Application #:
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10327283
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Filing Dt:
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12/19/2002
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Title:
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DIAMOND METAL-FILLED PATTERNS ACHIEVING LOW PARASITIC COUPLING CAPACITANCE
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Patent #:
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|
Issue Dt:
|
03/15/2005
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Application #:
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10327283
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Filing Dt:
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12/19/2002
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Title:
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DIAMOND METAL-FILLED PATTERNS ACHIEVING LOW PARASITIC COUPLING CAPACITANCE
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10327452
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Filing Dt:
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12/20/2002
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Publication #:
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Pub Dt:
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06/24/2004
| | | | |
Title:
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ADAPTIVE SEM EDGE RECOGNITION ALGORITHM
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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10328066
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Filing Dt:
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12/23/2002
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Title:
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IN-SITU METROLOGY SYSTEM AND METHOD FOR MONITORING METALIZATION AND OTHER THIN FILM FORMATION
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Patent #:
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|
Issue Dt:
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03/08/2005
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Application #:
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10328346
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Filing Dt:
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12/24/2002
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Title:
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CHROMELESS PHASE SHIFT MASK USING NON-LINEAR OPTICAL MATERIALS
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Patent #:
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Issue Dt:
|
12/06/2005
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Application #:
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10328614
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Filing Dt:
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12/23/2002
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Title:
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LOW K POLYMER E-BEAM PRINTABLE MECHANICAL SUPPORT
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10334430
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Filing Dt:
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12/30/2002
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Publication #:
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Pub Dt:
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07/01/2004
| | | | |
Title:
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OPTIMIZATION OF DIE YIELD IN A SILICON WAFER "SWEET SPOT"
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Patent #:
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|
Issue Dt:
|
11/02/2004
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Application #:
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10335177
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Filing Dt:
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12/31/2002
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Title:
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MODULAR GROWTH OF MULTIPLE GATE OXIDES
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10341082
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Filing Dt:
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01/13/2003
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Publication #:
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Pub Dt:
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07/15/2004
| | | | |
Title:
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BOND PAD DESIGN
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10360276
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Filing Dt:
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02/07/2003
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Publication #:
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Pub Dt:
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07/31/2003
| | | | |
Title:
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Process for oxide fabrication using oxidation steps below and above a threshold temperature
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Patent #:
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|
Issue Dt:
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05/17/2005
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Application #:
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10360746
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Filing Dt:
|
02/05/2003
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Title:
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METHOD FOR PREVENTING BORDERLESS CONTACT TO WELL LEAKAGE
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10360903
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Filing Dt:
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02/07/2003
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Publication #:
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Pub Dt:
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08/12/2004
| | | | |
Title:
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METHOD TO USE A LASER TO PERFORM THE EDGE CLEAN OPERATION ON A SEMICONDUCTOR WAFER
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|
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Patent #:
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|
Issue Dt:
|
12/20/2005
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Application #:
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10368811
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Filing Dt:
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02/18/2003
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Publication #:
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|
Pub Dt:
|
08/07/2003
| | | | |
Title:
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SILICON GERMANIUM CMOS CHANNEL
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Patent #:
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|
Issue Dt:
|
04/25/2006
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Application #:
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10368812
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Filing Dt:
|
02/18/2003
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Publication #:
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Pub Dt:
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11/27/2003
| | | | |
Title:
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METHOD AND APPARATUS FOR ENHANCING IMAGE CONTRAST USING INTENSITY FILTRATION
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Patent #:
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|
Issue Dt:
|
01/06/2004
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Application #:
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10370812
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Filing Dt:
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02/20/2003
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Publication #:
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Pub Dt:
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08/14/2003
| | | | |
Title:
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APPARATUS FOR WASHING DRUMS
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Patent #:
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|
Issue Dt:
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12/07/2004
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Application #:
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10382142
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Filing Dt:
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03/05/2003
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Publication #:
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Pub Dt:
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09/09/2004
| | | | |
Title:
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DIFFUSED MOS DEVICES WITH STRAINED SILICON PORTIONS AND METHODS FOR FORMING SAME
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|
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Patent #:
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|
Issue Dt:
|
10/04/2005
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Application #:
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10382709
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Filing Dt:
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03/06/2003
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Publication #:
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Pub Dt:
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08/21/2003
| | | | |
Title:
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CAPACITOR WITH STOICHIOMETRICALLY ADJUSTED DIELECTRIC AND METHOD OF FABRICATING SAME
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Patent #:
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|
Issue Dt:
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12/14/2004
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Application #:
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10383031
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Filing Dt:
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03/06/2003
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Publication #:
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|
Pub Dt:
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08/28/2003
| | | | |
Title:
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INTEGRATED CIRCUIT ISOLATION SYSTEM
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Patent #:
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|
Issue Dt:
|
03/29/2005
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Application #:
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10383149
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Filing Dt:
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03/06/2003
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Publication #:
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|
Pub Dt:
|
08/07/2003
| | | | |
Title:
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LOCAL INTERCONNECT FOR INTEGRATED CIRCUIT
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Patent #:
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|
Issue Dt:
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04/04/2006
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Application #:
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10387846
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Filing Dt:
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03/13/2003
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Publication #:
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Pub Dt:
|
08/14/2003
| | | | |
Title:
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MICROMAGNETIC DEVICE FOR POWER PROCESSING APPLICATIONS AND METHOD OF MANUFACTURE THEREFOR
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|
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Patent #:
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|
Issue Dt:
|
06/08/2004
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Application #:
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10397451
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Filing Dt:
|
03/25/2003
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Title:
|
HIGH-K DIELECTRIC BIRD'S BEAK OPTIMIZATIONS USING IN-SITU O2 PLASMA OXIDATION
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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10397993
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Filing Dt:
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03/25/2003
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Publication #:
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|
Pub Dt:
|
11/06/2003
| | | | |
Title:
|
A low dielectric constant fluorine and carbon-containing silicon oxide dielectric material characterized by improved resistance to oxidation
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|
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Patent #:
|
|
Issue Dt:
|
05/17/2005
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Application #:
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10400252
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Filing Dt:
|
03/27/2003
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Publication #:
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|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
LOW VIA RESISTANCE SYSTEM
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|
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Patent #:
|
|
Issue Dt:
|
10/04/2005
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Application #:
|
10400278
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Filing Dt:
|
03/27/2003
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Publication #:
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|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
METAL PLANARIZATION SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10400279
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Filing Dt:
|
03/27/2003
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Publication #:
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|
Pub Dt:
|
10/02/2003
| | | | |
Title:
|
LOCAL INTERCONNECT
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|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
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Application #:
|
10400310
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Filing Dt:
|
03/27/2003
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Publication #:
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|
Pub Dt:
|
10/02/2003
| | | | |
Title:
|
REDUCED PARTICULATE ETCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10403611
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Filing Dt:
|
03/31/2003
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Publication #:
|
|
Pub Dt:
|
09/30/2004
| | | | |
Title:
|
LITHOGRAPHY LINE WIDTH MONITOR REFLECTING CHIP-WIDE AVERAGE FEATURE SIZE
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|
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Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
10404832
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Filing Dt:
|
04/01/2003
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Publication #:
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|
Pub Dt:
|
10/07/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH CONSTRICTED CURRENT PASSAGE
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|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10405666
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Filing Dt:
|
04/02/2003
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Publication #:
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|
Pub Dt:
|
10/30/2003
| | | | |
Title:
|
CARBON-DOPED HARD MASK AND METHOD OF PASSIVATING STRUCTURES DURING SEMICONDUCTOR DEVICE FABRICATION
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|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10409423
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Filing Dt:
|
04/08/2003
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Publication #:
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|
Pub Dt:
|
09/11/2003
| | | | |
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION IN DOUBLE DIFFUSED MOS TRANSISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10409859
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Filing Dt:
|
04/09/2003
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Publication #:
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|
Pub Dt:
|
10/14/2004
| | | | |
Title:
|
WAFER BLADE CONTACT MONITOR
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|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10414601
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Filing Dt:
|
04/15/2003
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Title:
|
DIELECTRIC BARRIER LAYER FOR INCREASING ELECTROMIGRATION LIFETIMES IN COPPER INTERCONNECT STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
10417708
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Filing Dt:
|
04/16/2003
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Title:
|
WAFER CHUCKING APPARATUS AND METHOD FOR SPIN PROCESSOR
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|
|
Patent #:
|
|
Issue Dt:
|
01/03/2006
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Application #:
|
10418375
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Filing Dt:
|
04/18/2003
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Publication #:
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|
Pub Dt:
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10/21/2004
| | | | |
Title:
|
ION RECOIL IMPLANTATION AND ENHANCED CARRIER MOBILITY IN CMOS DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10418560
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Filing Dt:
|
04/16/2003
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Publication #:
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|
Pub Dt:
|
10/21/2004
| | | | |
Title:
|
SELF-TIMED RELIABILITY AND YIELD VEHICLE ARRAY
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|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
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Application #:
|
10421068
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Filing Dt:
|
04/23/2003
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Publication #:
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|
Pub Dt:
|
12/02/2004
| | | | |
Title:
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PLANARIZATION WITH REDUCED DISHING
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|
|
Patent #:
|
|
Issue Dt:
|
08/28/2007
|
Application #:
|
10423184
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Filing Dt:
|
04/25/2003
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Title:
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METHOD FOR INCORPORATING GERMANIUM INTO A SEMICONDUCTOR WAFER
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|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
10434028
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Filing Dt:
|
05/08/2003
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Title:
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METHOD AND APPARATUS FOR FILTERING A CHEMICAL POLISHING SLURRY OF A WAFER FABRICATION PROCESS
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|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10435442
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Filing Dt:
|
05/09/2003
|
Publication #:
|
|
Pub Dt:
|
11/11/2004
| | | | |
Title:
|
MULTIPLE ALTERNATING PHASE SHIFT TECHNOLOGY FOR AMPLIFYING RESOLUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
|
Application #:
|
10435870
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Filing Dt:
|
05/12/2003
|
Publication #:
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|
Pub Dt:
|
11/18/2004
| | | | |
Title:
|
PROCESS FOR THE SELECTIVE CONTROL OF FEATURE SIZE IN LITHOGRAPHIC PROCESSING
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|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
10453821
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Filing Dt:
|
06/02/2003
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
LID LINER FOR CHEMICAL VAPOR DEPOSITION CHAMBER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
10454027
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Filing Dt:
|
06/04/2003
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
METHOD TO SELECTIVELY IDENTIFY RELIABILITY RISK DIE BASED ON CHARACTERISTICS OF LOCAL REGIONS ON THE WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
10454133
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Filing Dt:
|
06/04/2003
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Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
INCREASED QUALITY FACTOR OF A VARACTOR IN AN INTEGRATED CIRCUIT VIA A HIGH CONDUCTIVE REGION IN A WELL
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|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
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Application #:
|
10457942
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Filing Dt:
|
06/09/2003
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Title:
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METHOD OF SHALLOW TRENCH ISOLATION FORMATION AND PLANARIZATION
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|
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Patent #:
|
|
Issue Dt:
|
10/19/2004
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Application #:
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10459072
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Filing Dt:
|
06/11/2003
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Title:
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METHOD FOR COMPOSING A DIELECTRIC LAYER WITHIN AN INTERCONNECT STRUCTURE OF A MULTILAYER SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
10/19/2004
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Application #:
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10461255
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Filing Dt:
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06/13/2003
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Title:
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SEMICONDUCTOR WAFER CHUCK ASSEMBLY FOR A SEMICONDUCTOR PROCESSING DEVICE
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Patent #:
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Issue Dt:
|
03/11/2008
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Application #:
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10505198
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Filing Dt:
|
03/02/2005
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Publication #:
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Pub Dt:
|
10/19/2006
| | | | |
Title:
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CRYSTALLOGRAPHIC METROLOGY AND PROCESS CONTROL
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10600665
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Filing Dt:
|
06/20/2003
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Publication #:
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|
Pub Dt:
|
12/25/2003
| | | | |
Title:
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METHOD OF CHEMICALLY ALTERING A SILICON SURFACE AND ASSOCIATED ELECTRICAL DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10602357
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Filing Dt:
|
06/23/2003
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Publication #:
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Pub Dt:
|
12/23/2004
| | | | |
Title:
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METHOD OF SCREENING DEFECTS USING LOW VOLTAGE IDDQ MEASUREMENT
|
|
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Patent #:
|
|
Issue Dt:
|
07/27/2004
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Application #:
|
10602510
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Filing Dt:
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06/24/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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INTEGRATION OF SEMICONDUCTOR ON IMPLANTED INSULATOR
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10609889
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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05/20/2004
| | | | |
Title:
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COPPER SILICIDE PASSIVATION FOR IMPROVED RELIABILITY
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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10610002
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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12/30/2004
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Title:
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METHOD AND APPARATUS FOR MANUFACTURING MULTIPLE CIRCUIT PATTERNS USING A MULTIPLE PROJECT MASK
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10614776
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Filing Dt:
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07/07/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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PROCESS FOR PLANARIZING UPPER SURFACE OF DAMASCENE WIRING STRUCTURE FOR INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10615039
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Filing Dt:
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07/08/2003
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Publication #:
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Pub Dt:
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01/08/2004
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Title:
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LOW TEMPERATURE COEFFICIENT RESISTOR
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Patent #:
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Issue Dt:
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07/04/2006
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Application #:
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10619978
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Filing Dt:
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07/14/2003
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Publication #:
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Pub Dt:
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04/15/2004
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Title:
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PROCESS FOR REMOVAL OF PHOTORESIST MASK USED FOR MAKING VIAS IN LOW K CARBON-DOPED SILICON OXIDE DIELECTRIC MATERIAL, AND FOR REMOVAL OF ETCH RESIDUES FROM FORMATION OF VIAS AND REMOVAL OF PHOTORESIST MASK
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Patent #:
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Issue Dt:
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11/21/2006
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10623983
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07/21/2003
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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SHIELDING STRUCTURE FOR USE IN A METAL-OXIDE-SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/25/2005
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10627289
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07/25/2003
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Publication #:
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Pub Dt:
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01/27/2005
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Title:
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LOW GATE RESISTANCE LAYOUT PROCEDURE FOR RF TRANSISTOR DEVICES
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Patent #:
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Issue Dt:
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09/13/2005
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10628601
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Filing Dt:
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07/28/2003
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Publication #:
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Pub Dt:
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04/15/2004
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Title:
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METHOD AND APPARATUS FOR DETECTING BACKSIDE CONTAMINATION DURING FABRICATION OF A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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06/28/2011
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10628614
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Filing Dt:
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07/28/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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WAFER EDGE DEFECT INSPECTION USING CAPTURED IMAGE ANALYSIS
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Patent #:
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Issue Dt:
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01/10/2006
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10628986
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Filing Dt:
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07/28/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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METHOD OF MAPPING LOGIC FAILURES IN AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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04/25/2006
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10633334
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08/01/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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TEMPERATURE OPTIMIZATION OF A PHYSICAL VAPOR DEPOSITION PROCESS TO PREVENT EXTRUSION INTO OPENINGS
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Patent #:
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Issue Dt:
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02/20/2007
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10634416
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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METHOD AND APPARATUS FOR INTEGRATING SIX SIGMA METHODOLOGY INTO INSPECTION RECEIVING PROCESS OF OUTSOURCED SUBASSEMBLIES, PARTS, AND MATERIALS: ACCEPTANCE, REJECTION, TRENDING, TRACKING AND CLOSED LOOP CORRECTIVE ACTION
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Patent #:
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Issue Dt:
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09/13/2005
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10640778
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Filing Dt:
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08/13/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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METHOD OF DETECTING SPATIALLY CORRELATED VARIATIONS IN A PARAMETER OF AN INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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05/17/2005
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10643123
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08/18/2003
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Pub Dt:
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02/24/2005
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Title:
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METHOD AND APPARATUS USING AN ON-CHIP RING OSCILLATOR FOR CHIP IDENTIFICATION
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Patent #:
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Issue Dt:
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07/11/2006
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10646997
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08/22/2003
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Pub Dt:
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02/24/2005
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Title:
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A SPIRAL INDUCTOR FORMED IN A SEMICONDUCTOR SUBSTRATE
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Issue Dt:
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04/26/2005
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10648602
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08/25/2003
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Title:
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FORMING COPPER INTERCONNECTS WITH SN COATINGS
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Patent #:
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Issue Dt:
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11/23/2004
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10649140
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08/27/2003
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Pub Dt:
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08/05/2004
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Title:
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METHOD OF MAKING ULTRA THIN BODY VERTICAL REPLACEMENT GATE MOSFET
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Issue Dt:
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03/21/2006
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10652007
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08/29/2003
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Pub Dt:
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05/12/2005
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Title:
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LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION
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Patent #:
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Issue Dt:
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08/30/2005
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10652369
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
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05/30/2006
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10655050
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09/04/2003
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Pub Dt:
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03/10/2005
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Title:
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PHASE-SHIFTING MASK AND SEMICONDUCTOR DEVICE
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03/14/2006
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10661013
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09/12/2003
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Pub Dt:
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03/17/2005
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Title:
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WAFER EDGE INSPECTION DATA GATHERING
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07/28/2009
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10675258
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09/30/2003
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Publication #:
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Pub Dt:
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10/14/2004
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Title:
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ALUMINUM PAD POWER BUS AND SIGNAL ROUTING FOR INTEGRATED CIRCUIT DEVICES UTILIZING COPPER TECHNOLOGY INTERCONNECT STRUCTURES
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08/08/2006
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10675259
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09/30/2003
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03/31/2005
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Title:
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METHOD FOR CONTROLLING TRENCH DEPTH IN SHALLOW TRENCH ISOLATION FEATURES
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07/18/2006
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10675263
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09/30/2003
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03/31/2005
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Title:
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SELECTIVE ISOTROPIC ETCH FOR TITANIUM-BASED MATERIALS
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08/28/2007
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10675572
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09/30/2003
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03/31/2005
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Title:
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REAL-TIME GATE ETCH CRITICAL DIMENSION CONTROL BY OXYGEN MONITORING
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12/27/2005
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10676602
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10/01/2003
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Pub Dt:
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04/21/2005
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SUBSTRATE-BIASED I/O AND POWER ESD PROTECTION CIRCUITS IN DEEP-SUBMICRON TWIN-WELL PROCESS
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01/03/2006
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10679004
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10/02/2003
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Title:
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MECHANISM FOR IMPROVING THE STRUCTURAL INTEGRITY OF LOW-K FILMS
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Issue Dt:
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09/28/2004
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10680047
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10/07/2003
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Title:
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NONINTRUSIVE WAFER MARKING
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12/06/2005
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10680503
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10/06/2003
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Title:
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METHOD OF REDUCING PROCESS PLASMA DAMAGE USING OPTICAL SPECTROSCOPY
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02/28/2006
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10688231
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10/17/2003
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04/21/2005
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METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING IMPROVED PERFORMANCE AND RELIABILITY
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06/14/2005
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10691400
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10/22/2003
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04/28/2005
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ULTRA LOW DIELECTRIC CONSTANT THIN FILM
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03/22/2005
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10691938
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10/23/2003
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METHOD AND APPARATUS FOR MEASURING SHEET RESISTANCE
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11/27/2007
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10694611
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10/27/2003
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05/06/2004
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SEMICONDUCTOR DEVICE HAVING REDUCED INTRA-LEVEL AND INTER-LEVEL CAPACITANCE
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09/26/2006
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10696203
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10/29/2003
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05/05/2005
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PROCESS YIELD LEARNING
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03/13/2007
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10696320
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10/29/2003
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05/05/2005
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NEW METHODOLOGY TO MEASURE MANY MORE TRANSISTORS ON THE SAME TEST AREA
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01/29/2008
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10697506
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10/29/2003
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Title:
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METHOD OF VAPORIZING AND IONIZING METALS FOR USE IN SEMICONDUCTOR PROCESSING
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08/01/2006
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10697507
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10/29/2003
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Title:
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VAPORIZATION AND IONIZATION OF METALS FOR USE IN SEMICONDUCTOR PROCESSING
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