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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:016206/0616   Pages: 4
Recorded: 07/01/2005
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 15
1
Patent #:
NONE
Issue Dt:
Application #:
10765272
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
10/28/2004
Title:
WET ETCHING APPARATUS
2
Patent #:
Issue Dt:
08/08/2006
Application #:
10796978
Filing Dt:
03/11/2004
Publication #:
Pub Dt:
09/30/2004
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
3
Patent #:
NONE
Issue Dt:
Application #:
10797577
Filing Dt:
03/11/2004
Publication #:
Pub Dt:
10/21/2004
Title:
WET ETCHING APPARATUS
4
Patent #:
Issue Dt:
06/06/2006
Application #:
10855466
Filing Dt:
05/28/2004
Publication #:
Pub Dt:
12/09/2004
Title:
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE THAT INCLUDES PLASMA TREATING AN INSULATING FILM WITH A MIXTURE OF HELIUM AND ARGON GASES
5
Patent #:
Issue Dt:
05/09/2006
Application #:
10855467
Filing Dt:
05/28/2004
Publication #:
Pub Dt:
12/16/2004
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
6
Patent #:
Issue Dt:
04/19/2005
Application #:
10889100
Filing Dt:
07/13/2004
Publication #:
Pub Dt:
01/20/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
7
Patent #:
NONE
Issue Dt:
Application #:
10901997
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
03/10/2005
Title:
Semiconductor device including stacked gate insulating film
8
Patent #:
Issue Dt:
01/10/2006
Application #:
10917288
Filing Dt:
08/13/2004
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
9
Patent #:
Issue Dt:
10/24/2006
Application #:
10940820
Filing Dt:
09/15/2004
Publication #:
Pub Dt:
03/24/2005
Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
10
Patent #:
NONE
Issue Dt:
Application #:
10973424
Filing Dt:
10/27/2004
Publication #:
Pub Dt:
05/05/2005
Title:
Exposure method
11
Patent #:
Issue Dt:
01/20/2009
Application #:
10974813
Filing Dt:
10/28/2004
Publication #:
Pub Dt:
05/12/2005
Title:
METHOD FOR FORMING PATTERN
12
Patent #:
Issue Dt:
02/14/2006
Application #:
10980279
Filing Dt:
11/04/2004
Publication #:
Pub Dt:
05/12/2005
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
13
Patent #:
NONE
Issue Dt:
Application #:
11003484
Filing Dt:
12/06/2004
Publication #:
Pub Dt:
09/22/2005
Title:
Semiconductor device
14
Patent #:
NONE
Issue Dt:
Application #:
11014883
Filing Dt:
12/20/2004
Publication #:
Pub Dt:
08/04/2005
Title:
Multilayered wiring structure, method of forming buried wiring, semiconductor device, method of manufacturing semiconductor device, semiconductor mounted device, and method of manufacturing semiconductor mounted device
15
Patent #:
Issue Dt:
01/24/2006
Application #:
11020395
Filing Dt:
12/27/2004
Publication #:
Pub Dt:
06/30/2005
Title:
MASS-PRODUCTION TRANSFER SUPPORT SYSTEM AND SEMICONDUCTOR MANUFACTURING SYSTEM
Assignor
1
Exec Dt:
06/01/2005
Assignee
1
2-4-1 MARUNOUCHI
CHIYODA-KU
TOKYO, JAPAN 100-6334
Correspondence name and address
JEFFREY A. WYAND
700 THIRTEENTH STREET, N. W.
SUITE 300
WASHINGTON, DC 20005

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