Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 040148/0623 | |
| Pages: | 18 |
| | Recorded: | 10/27/2016 | | |
Attorney Dkt #: | RTN97010C5 |
Conveyance: | RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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02/22/2000
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Application #:
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08970520
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Filing Dt:
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11/14/1997
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Title:
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MEMORY CELL CONFIGURATION FOR A 1T/1C FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09465724
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Filing Dt:
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12/17/1999
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Title:
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PLATE LINE DRIVER CIRCUIT FOR A 1T/1C FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09663121
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Filing Dt:
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09/15/2000
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Title:
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Reference cell configuration for a 1T/1C ferroelectric memory
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09764223
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Filing Dt:
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01/16/2001
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Publication #:
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Pub Dt:
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10/25/2001
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Title:
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SENSE AMPLIFIER CONFIGURATION FOR A 1T/1C FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10389276
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Filing Dt:
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03/13/2003
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Publication #:
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Pub Dt:
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11/13/2003
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Title:
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COLUMN DECODER CONFIGURATION FOR A 1T/1C MEMORY
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10993202
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Filing Dt:
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11/18/2004
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Publication #:
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Pub Dt:
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06/09/2005
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Title:
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Reference cell configuration for a 1T/1C ferroelectric memory
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Assignee
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198 CHAMPION CT. |
SAN JOSE, CALIFORNIA 95134 |
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Correspondence name and address
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CYPRESS SEMICONDUCTOR CORPORATION
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198 CHAMPION CT.
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SAN JOSE, CA 95134
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