Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 015487/0627 | |
| Pages: | 4 |
| | Recorded: | 06/22/2004 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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04/13/1993
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Application #:
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07725866
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Filing Dt:
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07/03/1991
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Title:
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THE BIDIRECTIONAL CAPABILITY IS ALWAYS USED FOR INTERCONNECTION TEST, WHETHER THE INDIVIDUAL DEVICE PIN IS FUNCTIONAL AN INPUT, AND OUTPUT OR BIDIRECTIONAL
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Patent #:
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Issue Dt:
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06/18/1996
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Application #:
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07876534
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Filing Dt:
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04/30/1992
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Title:
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BOUNDARY TEST CELL WITH SELF MASKING CAPABILITY
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Patent #:
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Issue Dt:
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12/05/1995
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Application #:
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08078710
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Filing Dt:
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06/17/1993
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Title:
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HIGH IMPEDANCE TECHNIQUE FOR TESTING INTERCONNECTIONS IN DIGITAL SYSTEMS
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Patent #:
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Issue Dt:
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11/19/1996
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Application #:
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08465669
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Filing Dt:
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06/05/1995
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Title:
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SAMPLE AND HOLD FLIP-FLOP FOR CMOS LOGIC
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Assignee
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| 7200 HUGHES TERRACE |
| LOS ANGELES, CALIFORNIA 90045 |
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Correspondence name and address
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RAYTHEON COMPANY
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LEONARD A. ALKOV
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P.O. BOX 902
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EL SEGUNDO, CA 90245-0902
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