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Reel/Frame:	032439/0638			Pages:	39
		Recorded:	03/13/2014
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 1383
Page 11 of 14
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Patent #:	8399973	Issue Dt:	03/19/2013	Application #:	12168354	Filing Dt:	07/07/2008
Publication #:	US20090161402	Pub Dt:	06/25/2009
Title:	DATA STORAGE AND STACKABLE CONFIGURATIONS

Patent #:	8139390	Issue Dt:	03/20/2012	Application #:	12169115	Filing Dt:	07/08/2008
Publication #:	US20100011174	Pub Dt:	01/14/2010
Title:	MIXED DATA RATES IN MEMORY DEVICES AND SYSTEMS

Patent #:	7945885	Issue Dt:	05/17/2011	Application #:	12176645	Filing Dt:	07/21/2008
Publication #:	US20080276105	Pub Dt:	11/06/2008
Title:	POWER MANAGERS FOR AN INTEGRATED CIRCUIT

Patent #:	7719892	Issue Dt:	05/18/2010	Application #:	12179835	Filing Dt:	07/25/2008
Publication #:	US20080279003	Pub Dt:	11/13/2008
Title:	FLASH MEMORY DEVICE WITH DATA OUTPUT CONTROL

Patent #:	7903477	Issue Dt:	03/08/2011	Application #:	12181115	Filing Dt:	07/28/2008
Publication #:	US20090219767	Pub Dt:	09/03/2009
Title:	PRE-CHARGE VOLTAGE GENERATION AND POWER SAVING MODES

Patent #:	7889720	Issue Dt:	02/15/2011	Application #:	12181738	Filing Dt:	07/29/2008
Publication #:	US20090046742	Pub Dt:	02/19/2009
Title:	OUTLET WITH ANALOG SIGNAL ADAPTER, A METHOD FOR USE THEREOF AND A NETWORK USING SAID OUTLET

Patent #:	8351582	Issue Dt:	01/08/2013	Application #:	12185577	Filing Dt:	08/04/2008
Publication #:	US20080292073	Pub Dt:	11/27/2008
Title:	NETWORK FOR TELEPHONY AND DATA COMMUNICATION

Patent #:	7952404	Issue Dt:	05/31/2011	Application #:	12192215	Filing Dt:	08/15/2008
Publication #:	US20100039148	Pub Dt:	02/18/2010
Title:	APPARATUS AND METHOD FOR MODELING COARSE STEPSIZE DELAY ELEMENT AND DELAY LOCKED LOOP USING SAME

Patent #:	7656223	Issue Dt:	02/02/2010	Application #:	12193077	Filing Dt:	08/18/2008
Publication #:	US20080303569	Pub Dt:	12/11/2008
Title:	DELAY LOCKED LOOP CIRCUIT

Patent #:	NONE	Issue Dt:		Application #:	12200110	Filing Dt:	08/28/2008
Publication #:	US20080311882	Pub Dt:	12/18/2008
Title:	MULTI-HAZARD ALARM SYSTEM USING SELECTABLE POWER-LEVEL TRANSMISSION AND LOCALIZATION

Patent #:	8145925	Issue Dt:	03/27/2012	Application #:	12210580	Filing Dt:	09/15/2008
Publication #:	US20090164830	Pub Dt:	06/25/2009
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH POWER SAVING FEATURE

Patent #:	8627009	Issue Dt:	01/07/2014	Application #:	12211159	Filing Dt:	09/16/2008
Publication #:	US20100070709	Pub Dt:	03/18/2010
Title:	CACHE FILTERING METHOD AND APPARATUS

Patent #:	10236032	Issue Dt:	03/19/2019	Application #:	12212902	Filing Dt:	09/18/2008
Publication #:	US20100067278	Pub Dt:	03/18/2010
Title:	MASS DATA STORAGE SYSTEM WITH NON-VOLATILE MEMORY MODULES

Patent #:	7616035	Issue Dt:	11/10/2009	Application #:	12214053	Filing Dt:	06/16/2008
Publication #:	US20090201058	Pub Dt:	08/13/2009
Title:	CHARGE PUMP FOR PLL/DLL

Patent #:	7609573	Issue Dt:	10/27/2009	Application #:	12221195	Filing Dt:	07/31/2008
Publication #:	US20090073792	Pub Dt:	03/19/2009
Title:	EMBEDDED MEMORY DATABUS ARCHITECTURE

Patent #:	7791175	Issue Dt:	09/07/2010	Application #:	12236874	Filing Dt:	09/24/2008
Publication #:	US20090020855	Pub Dt:	01/22/2009
Title:	METHOD FOR STACKING SERIALLY-CONNECTED INTEGRATED CIRCUITS AND MULTI-CHIP DEVICE MADE FROM SAME

Patent #:	8181056	Issue Dt:	05/15/2012	Application #:	12241832	Filing Dt:	09/30/2008
Publication #:	US20100083027	Pub Dt:	04/01/2010
Title:	SERIAL-CONNECTED MEMORY SYSTEM WITH OUTPUT DELAY ADJUSTMENT

Patent #:	8161313	Issue Dt:	04/17/2012	Application #:	12241960	Filing Dt:	09/30/2008
Publication #:	US20100083028	Pub Dt:	04/01/2010
Title:	SERIAL-CONNECTED MEMORY SYSTEM WITH DUTY CYCLE CORRECTION

Patent #:	7751262	Issue Dt:	07/06/2010	Application #:	12249413	Filing Dt:	10/10/2008
Publication #:	US20090034347	Pub Dt:	02/05/2009
Title:	HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY

Patent #:	7696777	Issue Dt:	04/13/2010	Application #:	12252025	Filing Dt:	10/15/2008
Publication #:	US20090039914	Pub Dt:	02/12/2009
Title:	SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION

Patent #:	8131913	Issue Dt:	03/06/2012	Application #:	12254315	Filing Dt:	10/20/2008
Publication #:	US20090198857	Pub Dt:	08/06/2009
Title:	SELECTIVE BROADCASTING OF DATA IN SERIES CONNECTED DEVICES

Patent #:	7983099	Issue Dt:	07/19/2011	Application #:	12258056	Filing Dt:	10/24/2008
Publication #:	US20090161451	Pub Dt:	06/25/2009
Title:	DUAL FUNCTION COMPATIBLE NON-VOLATILE MEMORY DEVICE

Patent #:	8929523	Issue Dt:	01/06/2015	Application #:	12264536	Filing Dt:	11/04/2008
Publication #:	US20090060151	Pub Dt:	03/05/2009
Title:	NETWORK FOR TELEPHONY AND DATA COMMUNICATION

Patent #:	7781819	Issue Dt:	08/24/2010	Application #:	12270286	Filing Dt:	11/13/2008
Publication #:	US20090072350	Pub Dt:	03/19/2009
Title:	SEMICONDUCTOR DEVICES HAVING A CONTACT PLUG AND FABRICATION METHODS THEREOF

Patent #:	7826294	Issue Dt:	11/02/2010	Application #:	12275701	Filing Dt:	11/21/2008
Publication #:	US20090073768	Pub Dt:	03/19/2009
Title:	MEMORY WITH OUTPUT CONTROL

Patent #:	7592837	Issue Dt:	09/22/2009	Application #:	12284311	Filing Dt:	09/19/2008
Publication #:	US20090027080	Pub Dt:	01/29/2009
Title:	LOW LEAKAGE AND DATA RETENTION CIRCUITRY

Patent #:	7746136	Issue Dt:	06/29/2010	Application #:	12284763	Filing Dt:	09/25/2008
Publication #:	US20090039931	Pub Dt:	02/12/2009
Title:	FREQUENCY-DOUBLING DELAY LOCKED LOOP

Patent #:	NONE	Issue Dt:		Application #:	12286959	Filing Dt:	10/03/2008
Publication #:	US20090187701	Pub Dt:	07/23/2009
Title:	Nand flash memory access with relaxed timing constraints

Patent #:	7656988	Issue Dt:	02/02/2010	Application #:	12315289	Filing Dt:	12/02/2008
Publication #:	US20090086876	Pub Dt:	04/02/2009
Title:	START UP CIRCUIT FOR DELAY LOCKED LOOP

Patent #:	7692461	Issue Dt:	04/06/2010	Application #:	12317877	Filing Dt:	12/30/2008
Publication #:	US20090121760	Pub Dt:	05/14/2009
Title:	CHARGE PUMP FOR PLL/DLL

Patent #:	8467486	Issue Dt:	06/18/2013	Application #:	12325074	Filing Dt:	11/28/2008
Publication #:	US20090154285	Pub Dt:	06/18/2009
Title:	MEMORY CONTROLLER WITH FLEXIBLE DATA ALIGNMENT TO CLOCK

Patent #:	8068365	Issue Dt:	11/29/2011	Application #:	12329929	Filing Dt:	12/08/2008
Publication #:	US20090196103	Pub Dt:	08/06/2009
Title:	NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE

Patent #:	7996811	Issue Dt:	08/09/2011	Application #:	12332529	Filing Dt:	12/11/2008
Publication #:	US20090152948	Pub Dt:	06/18/2009
Title:	POWER MANAGERS FOR AN INTEGRATED CIRCUIT

Patent #:	7843799	Issue Dt:	11/30/2010	Application #:	12333617	Filing Dt:	12/12/2008
Publication #:	US20090092065	Pub Dt:	04/09/2009
Title:	TELEPHONE COMMUNICATION SYSTEM AND METHOD OVER LOCAL AREA NETWORK WIRING

Patent #:	8064776	Issue Dt:	11/22/2011	Application #:	12335991	Filing Dt:	12/16/2008
Publication #:	US20100040382	Pub Dt:	02/18/2010
Title:	DISPERSION TOLERANT OPTICAL SYSTEM AND METHOD

Patent #:	7870435	Issue Dt:	01/11/2011	Application #:	12336371	Filing Dt:	12/16/2008
Publication #:	US20090100291	Pub Dt:	04/16/2009
Title:	MEMORY DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY

Patent #:	7978518	Issue Dt:	07/12/2011	Application #:	12337038	Filing Dt:	12/17/2008
Publication #:	US20090161437	Pub Dt:	06/25/2009
Title:	HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY

Patent #:	8037235	Issue Dt:	10/11/2011	Application #:	12337841	Filing Dt:	12/18/2008
Publication #:	US20100161877	Pub Dt:	06/24/2010
Title:	DEVICE AND METHOD FOR TRANSFERRING DATA TO A NON-VOLATILE MEMORY DEVICE

Patent #:	7916569	Issue Dt:	03/29/2011	Application #:	12339946	Filing Dt:	12/19/2008
Publication #:	US20090103383	Pub Dt:	04/23/2009
Title:	DYNAMIC RANDOM ACCESS MEMORY WITH FULLY INDEPENDENT PARTIAL ARRAY REFRESH FUNCTION

Patent #:	7701753	Issue Dt:	04/20/2010	Application #:	12341316	Filing Dt:	12/22/2008
Publication #:	US20090103384	Pub Dt:	04/23/2009
Title:	APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS

Patent #:	7692994	Issue Dt:	04/06/2010	Application #:	12349756	Filing Dt:	01/07/2009
Publication #:	US20090122631	Pub Dt:	05/14/2009
Title:	DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH

Patent #:	7894294	Issue Dt:	02/22/2011	Application #:	12352009	Filing Dt:	01/12/2009
Publication #:	US20090185434	Pub Dt:	07/23/2009
Title:	OPERATIONAL MODE CONTROL IN SERIAL-CONNECTED MEMORY BASED ON IDENTIFIER

Patent #:	8120990	Issue Dt:	02/21/2012	Application #:	12364665	Filing Dt:	02/03/2009
Publication #:	US20090196102	Pub Dt:	08/06/2009
Title:	FLEXIBLE MEMORY OPERATIONS IN NAND FLASH DEVICES

Patent #:	7643360	Issue Dt:	01/05/2010	Application #:	12366024	Filing Dt:	02/05/2009
Publication #:	US20090262592	Pub Dt:	10/22/2009
Title:	METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS

Patent #:	8472199	Issue Dt:	06/25/2013	Application #:	12367056	Filing Dt:	02/06/2009
Publication #:	US20100118482	Pub Dt:	05/13/2010
Title:	SYSTEM INCLUDING A PLURALITY OF ENCAPSULATED SEMICONDUCTOR CHIPS

Patent #:	7688610	Issue Dt:	03/30/2010	Application #:	12368473	Filing Dt:	02/10/2009
Publication #:	US20090147556	Pub Dt:	06/11/2009
Title:	LOW POWER MATCH-LINE SENSING CIRCUIT

Patent #:	8026738	Issue Dt:	09/27/2011	Application #:	12368512	Filing Dt:	02/10/2009
Publication #:	US20090140800	Pub Dt:	06/04/2009
Title:	INTEGRATED CIRCUIT WITH SIGNAL BUS FORMED BY CELL ABUTMENT OF LOGIC CELLS

Patent #:	7706188	Issue Dt:	04/27/2010	Application #:	12371088	Filing Dt:	02/13/2009
Publication #:	US20090147569	Pub Dt:	06/11/2009
Title:	FLASH MEMORY PROGRAM INHIBIT SCHEME

Patent #:	7865685	Issue Dt:	01/04/2011	Application #:	12371255	Filing Dt:	02/13/2009
Publication #:	US20090175103	Pub Dt:	07/09/2009
Title:	SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE

Patent #:	7908427	Issue Dt:	03/15/2011	Application #:	12387058	Filing Dt:	04/27/2009
Publication #:	US20100030949	Pub Dt:	02/04/2010
Title:	NON-VOLATILE MEMORY DEVICES AND CONTROL AND OPERATION THEREOF

Patent #:	7984337	Issue Dt:	07/19/2011	Application #:	12389153	Filing Dt:	02/19/2009
Publication #:	US20100211827	Pub Dt:	08/19/2010
Title:	ADDRESS TRANSLATION TRACE MESSAGE GENERATION FOR DEBUG

Patent #:	7992052	Issue Dt:	08/02/2011	Application #:	12389156	Filing Dt:	02/19/2009
Publication #:	US20100211828	Pub Dt:	08/19/2010
Title:	PROGRAM CORRELATION MESSAGE GENERATION FOR DEBUG

Patent #:	7679976	Issue Dt:	03/16/2010	Application #:	12391810	Filing Dt:	02/24/2009
Publication #:	US20090161458	Pub Dt:	06/25/2009
Title:	CIRCUIT AND METHOD FOR TESTING MULTI-DEVICE SYSTEMS

Patent #:	8200925	Issue Dt:	06/12/2012	Application #:	12399315	Filing Dt:	03/06/2009
Publication #:	US20100115217	Pub Dt:	05/06/2010
Title:	DATA MIRRORING IN SERIAL-CONNECTED MEMORY SYSTEM

Patent #:	7957173	Issue Dt:	06/07/2011	Application #:	12401963	Filing Dt:	03/11/2009
Publication #:	US20100091536	Pub Dt:	04/15/2010
Title:	COMPOSITE MEMORY HAVING A BRIDGING DEVICE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM

Patent #:	8169849	Issue Dt:	05/01/2012	Application #:	12412968	Filing Dt:	03/27/2009
Publication #:	US20090185442	Pub Dt:	07/23/2009
Title:	MEMORY SYSTEM AND METHOD WITH SERIAL AND PARALLEL MODES

Patent #:	7778107	Issue Dt:	08/17/2010	Application #:	12416512	Filing Dt:	04/01/2009
Publication #:	US20090185424	Pub Dt:	07/23/2009
Title:	DECODING CONTROL WITH ADDRESS TRANSITION DETECTION IN PAGE ERASE FUNCTION

Patent #:	8880970	Issue Dt:	11/04/2014	Application #:	12418892	Filing Dt:	04/06/2009
Publication #:	US20100162053	Pub Dt:	06/24/2010
Title:	ERROR DETECTION METHOD AND A SYSTEM INCLUDING ONE OR MORE MEMORY DEVICES

Patent #:	8031502	Issue Dt:	10/04/2011	Application #:	12421112	Filing Dt:	04/09/2009
Publication #:	US20090190386	Pub Dt:	07/30/2009
Title:	HYBRID CONTENT ADDRESSABLE MEMORY

Patent #:	7894230	Issue Dt:	02/22/2011	Application #:	12429310	Filing Dt:	04/24/2009
Publication #:	US20100214812	Pub Dt:	08/26/2010
Title:	STACKED SEMICONDUCTOR DEVICES INCLUDING A MASTER DEVICE

Patent #:	7821827	Issue Dt:	10/26/2010	Application #:	12463759	Filing Dt:	05/11/2009
Publication #:	US20090225595	Pub Dt:	09/10/2009
Title:	FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME

Patent #:	8149634	Issue Dt:	04/03/2012	Application #:	12470877	Filing Dt:	05/22/2009
Publication #:	US20090231931	Pub Dt:	09/17/2009
Title:	LOW POWER MEMORY ARCHITECTURE

Patent #:	7924635	Issue Dt:	04/12/2011	Application #:	12472012	Filing Dt:	05/26/2009
Publication #:	US20090279366	Pub Dt:	11/12/2009
Title:	HYBRID SOLID-STATE MEMORY SYSTEM HAVING VOLATILE AND NON-VOLATILE MEMORY

Patent #:	7872921	Issue Dt:	01/18/2011	Application #:	12474056	Filing Dt:	05/28/2009
Publication #:	US20090231928	Pub Dt:	09/17/2009
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE

Patent #:	8291248	Issue Dt:	10/16/2012	Application #:	12488278	Filing Dt:	06/19/2009
Publication #:	US20090259873	Pub Dt:	10/15/2009
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH POWER SAVING FEATURE

Patent #:	8189390	Issue Dt:	05/29/2012	Application #:	12495089	Filing Dt:	06/30/2009
Publication #:	US20100226179	Pub Dt:	09/09/2010
Title:	NAND FLASH ARCHITECTURE WITH MULTI-LEVEL ROW DECODING

Patent #:	7965550	Issue Dt:	06/21/2011	Application #:	12499577	Filing Dt:	07/08/2009
Publication #:	US20090273973	Pub Dt:	11/05/2009
Title:	MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION

Patent #:	8521980	Issue Dt:	08/27/2013	Application #:	12504156	Filing Dt:	07/16/2009
Publication #:	US20110016279	Pub Dt:	01/20/2011
Title:	SIMULTANEOUS READ AND WRITE DATA TRANSFER

Patent #:	8164968	Issue Dt:	04/24/2012	Application #:	12505069	Filing Dt:	07/17/2009
Publication #:	US20090279375	Pub Dt:	11/12/2009
Title:	VOLTAGE DOWN CONVERTER FOR HIGH SPEED MEMORY

Patent #:	8549209	Issue Dt:	10/01/2013	Application #:	12508926	Filing Dt:	07/24/2009
Publication #:	US20100115214	Pub Dt:	05/06/2010
Title:	BRIDGING DEVICE HAVING A CONFIGURABLE VIRTUAL PAGE SIZE

Patent #:	7829788	Issue Dt:	11/09/2010	Application #:	12512705	Filing Dt:	07/30/2009
Publication #:	US20090288853	Pub Dt:	11/26/2009
Title:	ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE

Patent #:	8363623	Issue Dt:	01/29/2013	Application #:	12518905	Filing Dt:	06/12/2009
Publication #:	US20100034134	Pub Dt:	02/11/2010
Title:	ADAPTIVE ANTENNA SYSTEM FOR DIVERSITY AND INTERFERENCE AVOIDANCE IN A MULTI-STATION NETWORK

Patent #:	8347361	Issue Dt:	01/01/2013	Application #:	12518961	Filing Dt:	06/12/2009
Publication #:	US20100017608	Pub Dt:	01/21/2010
Title:	DISTRIBUTED NETWORK MANAGEMENT HIERARCHY IN A MULTI-STATION COMMUNICATION NETWORK

Patent #:	8134852	Issue Dt:	03/13/2012	Application #:	12533732	Filing Dt:	07/31/2009
Publication #:	US20100091538	Pub Dt:	04/15/2010
Title:	BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM

Patent #:	7907464	Issue Dt:	03/15/2011	Application #:	12542296	Filing Dt:	08/17/2009
Publication #:	US20090303824	Pub Dt:	12/10/2009
Title:	DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS

Patent #:	7940081	Issue Dt:	05/10/2011	Application #:	12542352	Filing Dt:	08/17/2009
Publication #:	US20100060319	Pub Dt:	03/11/2010
Title:	LOW LEAKAGE AND DATA RETENTION CIRCUITRY

Patent #:	8069363	Issue Dt:	11/29/2011	Application #:	12543839	Filing Dt:	08/19/2009
Publication #:	US20100033216	Pub Dt:	02/11/2010
Title:	DOUBLE DATA RATE OUTPUT LATCH FOR STATIC RAM DEVICE HAS EDGE-TRIGGERED FLIP-FLOP TO OUTPUT DDR SIGNAL TO SYNCHRONIZE WITH A SECOND CLOCK SIGNAL

Patent #:	8369182	Issue Dt:	02/05/2013	Application #:	12547955	Filing Dt:	08/26/2009
Publication #:	US20090316514	Pub Dt:	12/24/2009
Title:	DELAY LOCKED LOOP IMPLEMENTATION IN A SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY

Patent #:	8222930	Issue Dt:	07/17/2012	Application #:	12552040	Filing Dt:	09/01/2009
Publication #:	US20090315591	Pub Dt:	12/24/2009
Title:	POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION

Patent #:	7888261	Issue Dt:	02/15/2011	Application #:	12553691	Filing Dt:	09/03/2009
Publication #:	US20100197132	Pub Dt:	08/05/2010
Title:	BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ATOMIC HYDROGEN ENHANCED REFLOW

Patent #:	7859930	Issue Dt:	12/28/2010	Application #:	12562452	Filing Dt:	09/18/2009
Publication #:	US20100128546	Pub Dt:	05/27/2010
Title:	EMBEDDED MEMORY DATABUS ARCHITECTURE

Patent #:	8068382	Issue Dt:	11/29/2011	Application #:	12564492	Filing Dt:	09/22/2009
Publication #:	US20110032784	Pub Dt:	02/10/2011
Title:	SEMICONDUCTOR MEMORY WITH MULTIPLE WORDLINE SELECTION

Patent #:	RE43025	Issue Dt:	12/13/2011	Application #:	12566533	Filing Dt:	09/24/2009
Title:	MIXED COMPOSITION INTERFACE LAYER AND METHOD OF FORMING

Patent #:	NONE	Issue Dt:		Application #:	12578115	Filing Dt:	10/13/2009
Publication #:	US20100030951	Pub Dt:	02/04/2010
Title:	NONVOLATILE MEMORY SYSTEM

Patent #:	NONE	Issue Dt:		Application #:	12607680	Filing Dt:	10/28/2009
Publication #:	US20100115172	Pub Dt:	05/06/2010
Title:	BRIDGE DEVICE HAVING A VIRTUAL PAGE BUFFER

Patent #:	8194456	Issue Dt:	06/05/2012	Application #:	12617459	Filing Dt:	11/12/2009
Publication #:	US20100110794	Pub Dt:	05/06/2010
Title:	NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES

Patent #:	7929366	Issue Dt:	04/19/2011	Application #:	12619157	Filing Dt:	11/16/2009
Publication #:	US20100061172	Pub Dt:	03/11/2010
Title:	TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT

Patent #:	8086813	Issue Dt:	12/27/2011	Application #:	12619238	Filing Dt:	11/16/2009
Publication #:	US20110016282	Pub Dt:	01/20/2011
Title:	SYNCHRONOUS MEMORY READ DATA CAPTURE

Patent #:	8639912	Issue Dt:	01/28/2014	Application #:	12619355	Filing Dt:	11/16/2009
Publication #:	US20100064116	Pub Dt:	03/11/2010
Title:	METHOD AND SYSTEM FOR PACKET PROCESSING

Patent #:	7982532	Issue Dt:	07/19/2011	Application #:	12620749	Filing Dt:	11/18/2009
Publication #:	US20100066439	Pub Dt:	03/18/2010
Title:	SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT

Patent #:	7977985	Issue Dt:	07/12/2011	Application #:	12621983	Filing Dt:	11/19/2009
Publication #:	US20100060347	Pub Dt:	03/11/2010
Title:	BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT AND DELAY LINE

Patent #:	7817484	Issue Dt:	10/19/2010	Application #:	12623899	Filing Dt:	11/23/2009
Publication #:	US20100135089	Pub Dt:	06/03/2010
Title:	METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS

Patent #:	8873575	Issue Dt:	10/28/2014	Application #:	12627574	Filing Dt:	11/30/2009
Publication #:	US20100135479	Pub Dt:	06/03/2010
Title:	NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS

Patent #:	8982904	Issue Dt:	03/17/2015	Application #:	12627702	Filing Dt:	11/30/2009
Publication #:	US20100135480	Pub Dt:	06/03/2010
Title:	NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS

Patent #:	8289991	Issue Dt:	10/16/2012	Application #:	12627804	Filing Dt:	11/30/2009
Publication #:	US20100135191	Pub Dt:	06/03/2010
Title:	NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS

Patent #:	7969917	Issue Dt:	06/28/2011	Application #:	12633071	Filing Dt:	12/08/2009
Publication #:	US20100154022	Pub Dt:	06/17/2010
Title:	LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS

Patent #:	8045377	Issue Dt:	10/25/2011	Application #:	12635280	Filing Dt:	12/10/2009
Publication #:	US20100174854	Pub Dt:	07/08/2010
Title:	NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION

Patent #:	7893725	Issue Dt:	02/22/2011	Application #:	12638309	Filing Dt:	12/15/2009
Publication #:	US20100156483	Pub Dt:	06/24/2010
Title:	DELAY LOCKED LOOP CIRCUIT

Patent #:	8218707	Issue Dt:	07/10/2012	Application #:	12639531	Filing Dt:	12/16/2009
Publication #:	US20100109722	Pub Dt:	05/06/2010
Title:	INITIALIZATION CIRCUIT FOR DELAY LOCKED LOOP

100

Patent #:	8194481	Issue Dt:	06/05/2012	Application #:	12640388	Filing Dt:	12/17/2009
Publication #:	US20100157715	Pub Dt:	06/24/2010
Title:	SEMICONDUCTOR DEVICE WITH MAIN MEMORY UNIT AND AUXILIARY MEMORY UNIT REQUIRING PRESET OPERATION

Assignor

MOSAID TECHNOLOGIES INCORPORATED

Exec Dt:

01/01/2014

Assignee

CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.

11 HINES RD, SUITE 203

OTTAWA, ONTARIO, CANADA K2K2X1

Correspondence name and address
	CPA GLOBAL LIMITED
	LIBERATION HOUSE
	CASTLE STREET
	ST HELIER, JE1 1BL JERSEY

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