Total properties:
28
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09566901
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Filing Dt:
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05/10/2000
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Title:
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SOFTWARE CONTROL OF DRAM REFRESH TO REDUCE POWER CONSUMPTION IN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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02/19/2002
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Application #:
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09609490
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Filing Dt:
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07/05/2000
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Title:
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Dynamic programmable logic array that can be reprogrammed and a method of use
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09640486
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Filing Dt:
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08/16/2000
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Title:
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CONFIGURABLE DYNAMIC PROGRAMMABLE LOGIC ARRAY
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09661137
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Filing Dt:
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09/13/2000
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Title:
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Repairable dynamic programmable logic array
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09680672
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Filing Dt:
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10/06/2000
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Title:
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SELF-ADJUSTING MULTI-SPEED PIPELINE
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10004338
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Filing Dt:
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11/14/2001
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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OPERAND FILE USING POINTERS AND REFERENCE COUNTERS AND A METHOD OF USE
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Patent #:
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Issue Dt:
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01/25/2005
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Application #:
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10045127
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Filing Dt:
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10/26/2001
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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METHOD AND SYSTEM FOR PROGRAMMABLE REPLACEMENT MECHANISM FOR CACHING DEVICES
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10054471
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Filing Dt:
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01/18/2002
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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DYNAMIC PROGRAMMABLE LOGIC ARRAY THAT CAN BE REPROGRAMMED AND A METHOD OF USE
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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10071966
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Filing Dt:
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02/05/2002
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Publication #:
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Pub Dt:
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08/29/2002
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Title:
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FIELD-PROGRAMMABLE DYNAMIC LOGIC ARRAY
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11277761
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Filing Dt:
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03/29/2006
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Title:
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ADAPTIVE COMPUTING ENSEMBLE MICROPROCESSOR ARCHITECTURE
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Patent #:
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Issue Dt:
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05/12/2009
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Application #:
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11279880
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Filing Dt:
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04/15/2006
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Title:
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IMPROVED PREFETCH HARDWARE EFFICIENCY VIA PREFETCH HINT INSTRUCTIONS
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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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11306000
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Filing Dt:
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12/16/2005
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Title:
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SOFTWARE HINT TO SPECIFY THE PREFERRED BRANCH PREDICTION TO USE FOR A BRANCH INSTRUCTION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11525971
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Filing Dt:
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09/25/2006
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Publication #:
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Pub Dt:
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03/29/2007
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Title:
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METHOD OF TESTING A SUBSTRATE USING MULTRIPLE IMAGE-OBTAINING UNITS AND APPARATUS FOR PERFORMING THE SAME
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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11525972
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Filing Dt:
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09/25/2006
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Publication #:
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Pub Dt:
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03/29/2007
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Title:
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PLUNGER DRIVING STRUCTURE
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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11535977
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Filing Dt:
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09/27/2006
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Title:
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TRACE CACHE FOR EFFICIENT SELF-MODIFYING CODE PROCESSING
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Patent #:
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Issue Dt:
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09/08/2009
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Application #:
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11553453
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Filing Dt:
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10/26/2006
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Title:
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FLAG MANAGEMENT IN PROCESSORS ENABLED FOR SPECULATIVE EXECUTION OF MICRO-OPERATION TRACES
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11553455
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Filing Dt:
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10/26/2006
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Title:
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FLAG MANAGEMENT IN PROCESSORS ENABLED FOR SPECULATIVE EXECUTION OF MICRO-OPERATION TRACES
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11553458
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Filing Dt:
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10/26/2006
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Title:
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FLAG MANAGEMENT IN PROCESSORS ENABLED FOR SPECULATIVE EXECUTION OF MICRO-OPERATION TRACES
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Patent #:
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Issue Dt:
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09/14/2010
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Application #:
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11561274
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Filing Dt:
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11/17/2006
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Title:
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TRACE OPTIMIZATION VIA FUSING OPERATIONS OF A TARGET ARCHITECTURE OPERATION SET
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Patent #:
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Issue Dt:
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03/16/2010
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Application #:
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11561287
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Filing Dt:
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11/17/2006
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Title:
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EXECUTING FUNCTIONS DETERMINED VIA A COLLECTION OF OPERATIONS FROM TRANSLATED INSTRUCTIONS
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11566206
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Filing Dt:
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12/01/2006
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Title:
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MICROARCHITECTURE FOR COMPACT STORAGE OF EMBEDDED CONSTANTS
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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11645901
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Filing Dt:
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12/26/2006
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Title:
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PREDICTION OF DATA VALUES READ FROM MEMORY BY A MICROPROCESSOR USING A DYNAMIC CONFIDENCE THRESHOLD
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Patent #:
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Issue Dt:
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10/28/2008
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Application #:
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11740892
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Filing Dt:
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04/26/2007
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Title:
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REDUCED-POWER MEMORY WITH PER-SECTOR GROUND CONTROL
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Patent #:
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Issue Dt:
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02/16/2010
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Application #:
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11740901
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Filing Dt:
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04/26/2007
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Title:
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REDUCED-POWER MEMORY WITH PER-SECTOR POWER/GROUND CONTROL AND EARLY ADDRESS
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11751949
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Filing Dt:
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05/22/2007
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Title:
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RE-FETCHING CACHE MEMORY ENABLING LOW-POWER MODES
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Patent #:
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Issue Dt:
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04/26/2011
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Application #:
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11751973
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Filing Dt:
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05/22/2007
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Title:
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RE-FETCHING CACHE MEMORY ENABLING ALTERNATIVE OPERATIONAL MODES
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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11751985
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Filing Dt:
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05/22/2007
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Title:
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RE-FETCHING CACHE MEMORY HAVING COHERENT RE-FETCHING
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Patent #:
|
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Issue Dt:
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06/25/2013
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Application #:
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11774583
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Filing Dt:
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07/07/2007
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Title:
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CONTROLLING OPERATION OF A PROCESSOR ACCORDING TO EXECUTION MODE OF AN INSTRUCTION SEQUENCE
|
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