Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 016620/0651 | |
| Pages: | 5 |
| | Recorded: | 10/05/2005 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
9
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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11175835
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Filing Dt:
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07/06/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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BURIED GATE TRANSISTOR
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Patent #:
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Issue Dt:
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04/14/2009
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Application #:
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11203861
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Filing Dt:
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08/15/2005
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Publication #:
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Pub Dt:
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02/15/2007
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Title:
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DIFFERENTIAL CHIP PERFORMANCE WITHIN A MULTI-CHIP PACKAGE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11208362
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Filing Dt:
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08/19/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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Method for MCP packaging for balanced performance
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11210055
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Filing Dt:
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08/23/2005
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Publication #:
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Pub Dt:
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03/08/2007
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Title:
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FUSE RESISTANCE READ-OUT CIRCUIT
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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11211824
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Filing Dt:
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08/25/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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DIFFERENTIAL DUTY CYCLE RESTORATION
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Patent #:
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Issue Dt:
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11/06/2007
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Application #:
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11211825
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Filing Dt:
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08/25/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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DELAY LOCKED LOOP USING A FIFO CIRCUIT TO SYNCHRONIZE BETWEEN BLENDER AND COARSE DELAY CONTROL SIGNALS
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Patent #:
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Issue Dt:
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04/01/2008
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Application #:
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11215442
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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DUTY CYCLE CORRECTOR
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11215779
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Filing Dt:
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08/30/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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CLOCK CONTROLLER WITH INTEGRATED DLL AND DCC
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Patent #:
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Issue Dt:
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07/07/2009
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Application #:
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11218417
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Filing Dt:
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09/01/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Title:
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OVERLAY TARGET FOR POLARIZED LIGHT LITHOGRAPHY
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Assignee
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| ST.-MARTIN-STR. 53 |
| MUNICH, GERMANY 81669 |
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Correspondence name and address
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HEATHER ROWLAND
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3000 CENTREGREEN WAY
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CARY, NC 27513
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