Patent Assignment Details
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Reel/Frame: | 010593/0655 | |
| Pages: | 5 |
| | Recorded: | 02/11/2000 | | |
Conveyance: | CORRECTIVE ASSIGNMENT RE-RECORD OF INSTRUMENT PREVIOUSLY RECORDED ON REEL 9336, FRAME 0747 TO INCLUDE BOTH ASSIGNEES. |
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Total properties:
1
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Patent #:
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Issue Dt:
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04/18/2000
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Application #:
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09120031
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Filing Dt:
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07/21/1998
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Title:
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OUTPUT CIRCUIT AND SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE HAVING A FUNCTION OF PREVENTING OUTPUT OF INVALID DATA
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Assignees
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2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU |
TOKYO 100-8310, JAPAN |
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6-2, OOTEMACHI 2-CHOME, CHIYODA-KU |
TOKYO100-0004, JAPAN |
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Correspondence name and address
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MCDERMOTT, WILL & EMERY
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STEPHEN A. BECKER
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600 13TH STREET, N.W.
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WASHINGTON DC 20005
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