Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 011078/0659 | |
| Pages: | 3 |
| | Recorded: | 08/21/2000 | | |
| Conveyance: | CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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09221185
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Filing Dt:
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12/23/1998
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Title:
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DYNAMIC SLOT ALLOCATION AND TRACKING OF MULTIPLE MEMORY REQUESTS
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09221186
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Filing Dt:
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12/23/1998
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Title:
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TERMINATION RESISTOR IN PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09221187
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Filing Dt:
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12/23/1998
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Title:
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INSTRUCTION LOOK-AHEAD SYSTEM AND HARDWARE
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09221190
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Filing Dt:
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12/23/1998
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Title:
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RAM CONFIGURABLE REDUNDANCY
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09221297
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Filing Dt:
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12/23/1998
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Title:
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MULTI-TICK TRANSMISSION LINE AND DATA STORAGE ELEMENT
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09298323
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Filing Dt:
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04/23/1999
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Publication #:
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Pub Dt:
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06/06/2002
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Title:
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ADJUSTABLE DATA DELAY USING PROGRAMMABLE CLOCK SHIFT
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Assignee
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| SUITE 600 |
| 411 FIRST AVENUE SOUTH |
| SEATTLE, WASHINGTON 98104 |
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Correspondence name and address
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SEED INTELLECTUAL PROPERTY LAW GROUP
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PPLC, DAVID V. CARLSON
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701 FIFTH AVENUE
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SUITE 6300
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SEATTLE, WA 98104-7092
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