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Patent Assignment Details
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Reel/Frame:005927/0669   Pages: 2
Recorded: 11/18/1991
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST.
Total properties: 1
1
Patent #:
Issue Dt:
03/23/1993
Application #:
07793916
Filing Dt:
11/18/1991
Title:
METHOD OF MAKING EXTENDED POLYSILICON SELF-ALIGNED GATE OVERLAPPED LIGHTLY DOPED DRAIN STRUCTURE FOR SUBMICRON TRANSISTOR
Assignors
1
Exec Dt:
10/31/1991
2
Exec Dt:
10/30/1991
3
Exec Dt:
10/30/1991
4
Exec Dt:
10/30/1991
Assignee
1
1109 MCKAY DRIVE, SAN JOSE, CA 95131
Correspondence name and address
VLSI TECHNOLOGY, INC.,
LEGAL DEPT.,
1109 MC KAY DRIVE
SAN JOSE, CA 95131

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