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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10911220
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Filing Dt:
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08/03/2004
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Publication #:
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Pub Dt:
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02/10/2005
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Title:
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MANUFACTURING METHOD FOR NON-ACTIVE ELECTRICALLY STRUCTURES IN ORDER TO OPTIMIZE THE DEFINITION OF ACTIVE ELECTRICALLY STRUCTURES IN AN ELECTRONIC CIRCUIT INTEGRATED ON A SEMICONDUCTOR SUBSTRATE AND CORRESPONDING CIRCUIT
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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10939145
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Filing Dt:
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09/10/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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FORMING PHASE CHANGE MEMORY ARRAYS
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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10939237
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Filing Dt:
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09/10/2004
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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CONTROLLED BREAKDOWN PHASE CHANGE MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10948884
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Filing Dt:
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09/24/2004
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Publication #:
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Pub Dt:
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04/06/2006
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Title:
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PHASE CHANGE MEMORY WITH A SELECT DEVICE HAVING A BREAKDOWN LAYER
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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10949090
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Filing Dt:
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09/24/2004
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Publication #:
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Pub Dt:
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04/06/2006
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Title:
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PHASE CHANGE MEMORY WITH DAMASCENE MEMORY ELEMENT
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10971774
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Filing Dt:
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10/22/2004
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Publication #:
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Pub Dt:
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05/26/2005
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Title:
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SEALING METHOD FOR ELECTRONIC DEVICES FORMED ON A COMMON SEMICONDUCTOR SUBSTRATE AND CORRESPONDING CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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10977186
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Filing Dt:
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10/28/2004
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Publication #:
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Pub Dt:
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05/04/2006
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Title:
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DEPOSITING TITANIUM SILICON NITRIDE FILMS FOR FORMING PHASE CHANGE MEMORIES
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11009687
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Filing Dt:
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12/10/2004
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Publication #:
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Pub Dt:
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08/25/2005
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Title:
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METHOD FOR REDUCING DEFECTS AFTER A METAL ETCHING IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11029981
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Filing Dt:
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01/05/2005
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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READING PHASE CHANGE MEMORIES TO REDUCE READ DISTURBS
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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11037850
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Filing Dt:
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01/18/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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FORMING A CARBON LAYER BETWEEN PHASE CHANGE LAYERS OF A PHASE CHANGE MEMORY
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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11058797
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Filing Dt:
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02/15/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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PHASE CHANGE MEMORY BITS RESET THROUGH A SERIES OF PULSES OF INCREASING AMPLITUDE
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Patent #:
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Issue Dt:
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03/20/2007
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Application #:
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11059294
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Filing Dt:
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02/16/2005
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Publication #:
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Pub Dt:
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08/25/2005
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Title:
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METHOD FOR REDUCING NON-UNIFORMITY OR TOPOGRAPHY VARIATION BETWEEN AN ARRAY AND CIRCUITRY IN A PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED NON-VOLATILE MEMORY DEVICES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11092432
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Filing Dt:
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03/29/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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Locking entries into translation lookaside buffers
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Patent #:
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Issue Dt:
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02/18/2014
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Application #:
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11103188
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Filing Dt:
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04/11/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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HEATING PHASE CHANGE MATERIAL
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11185488
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Filing Dt:
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07/20/2005
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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PHASE CHANGE MEMORY WITH U-SHAPED CHALCOGENIDE CELL
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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11251664
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Filing Dt:
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10/17/2005
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Publication #:
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Pub Dt:
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02/16/2006
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Title:
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COMPACTING CIRCUIT RESPONSES
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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11261131
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Filing Dt:
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10/28/2005
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Publication #:
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Pub Dt:
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05/04/2006
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Title:
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Flash memory device with a low pin count (LPC) communication interface
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11261903
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Filing Dt:
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10/27/2005
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Publication #:
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Pub Dt:
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06/08/2006
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Title:
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PROGRAMMING METHOD OF MULTILEVEL MEMORIES AND CORRESPONDING CIRCUIT
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11279381
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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NON-VOLATILE MEMORY ELECTRONIC DEVICE WITH NAND STRUCTURE BEING MONOLITHICALLY INTEGRATED ON SEMICONDUCTOR
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11279384
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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INTEGRATED ELECTRONIC NON-VOLATILE MEMORY DEVICE HAVING NAND STRUCTURE
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Patent #:
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Issue Dt:
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09/02/2014
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Application #:
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11279385
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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NON-VOLATILE ELECTRONIC MEMORY DEVICE WITH NAND STRUCTURE BEING MONOLITHICALLY INTEGRATED ON SEMICONDUCTOR
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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11280803
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Filing Dt:
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11/16/2005
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Publication #:
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Pub Dt:
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06/22/2006
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Title:
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METHOD FOR CONFIGURING A VOLTAGE REGULATOR
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Patent #:
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Issue Dt:
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01/15/2008
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Application #:
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11300053
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Filing Dt:
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12/14/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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ELECTRONIC MEMORY DEVICE HAVING HIGH DENSITY NON-VOLATILE MEMORY CELLS AND A REDUCED CAPACITIVE INTERFERENCE CELL-TO-CELL
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Patent #:
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Issue Dt:
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09/22/2009
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Application #:
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11300145
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Filing Dt:
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12/14/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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ELECTRONIC MEMORY DEVICE HAVING HIGH INTEGRATION DENSITY NON-VOLATILE MEMORY CELLS AND A REDUCED CAPACITIVE COUPLING
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11319750
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Filing Dt:
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12/27/2005
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Publication #:
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Pub Dt:
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07/27/2006
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Title:
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METHOD FOR MANUFACTURING ELECTRONIC NON-VOLATILE MEMORY DEVICES INTEGRATED IN A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11319798
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Filing Dt:
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12/27/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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METHOD FOR MANUFACTURING NON-VOLATILE MEMORY DEVICES INTEGRATED IN A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11325961
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Filing Dt:
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01/05/2006
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Publication #:
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Pub Dt:
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06/01/2006
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Title:
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LARGE FORMAT EMISSIVE DISPLAY
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11344519
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Filing Dt:
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01/31/2006
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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REMOVABLE DATA STORAGE DEVICE AND RELATED ASSEMBLING METHOD
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11348513
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02/06/2006
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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METHOD FOR PROGRAMMING A MEMORY DEVICE SUITABLE TO MINIMIZE THE LATERAL COUPLING EFFECTS BETWEEN MEMORY CELLS
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Patent #:
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Issue Dt:
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03/09/2010
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Application #:
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11401521
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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ELECTRONIC NON-VOLATILE MEMORY DEVICE HAVING A CNAND STRUCTURE AND BEING MONOLITHICALLY INTEGRATED ON SEMICONDUCTOR
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11401523
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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INTEGRATED ELECTRONIC DEVICE HAVING A LOW VOLTAGE ELECTRIC SUPPLY
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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11411010
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Filing Dt:
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04/25/2006
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Publication #:
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Pub Dt:
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11/16/2006
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Title:
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DATA STORING METHOD FOR A NON-VOLATILE MEMORY CELL ARRAY HAVING AN ERROR CORRECTION CODE
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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11411311
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Filing Dt:
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04/26/2006
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Publication #:
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Pub Dt:
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11/01/2007
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Title:
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SELF-ALIGNED BIOPOLAR JUNCTION TRANSISTORS
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11434564
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Filing Dt:
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05/15/2006
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
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ROW DECODER CIRCUIT AND RELATED SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11457966
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Filing Dt:
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07/17/2006
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Publication #:
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Pub Dt:
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02/01/2007
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Title:
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SEALING METHOD FOR ELECTRONIC DEVICES FORMED ON A COMMON SEMICONDUCTOR SUBSTRATE AND CORRESPONDING CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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11463260
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Filing Dt:
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08/08/2006
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Publication #:
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Pub Dt:
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02/14/2008
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Title:
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HIGH VOLTAGE GENERATOR OF THE DAC-CONTROLLED TYPE
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11469754
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Filing Dt:
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09/01/2006
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11530199
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Filing Dt:
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09/08/2006
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Publication #:
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Pub Dt:
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05/24/2007
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Title:
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MEMORY ARCHITECTURE WITH SERIAL PERIPHERAL INTERFACE
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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11561799
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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07/05/2007
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Title:
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METHOD FOR ACCESSING IN READING, WRITING AND PROGRAMMING TO A NAND NON-VOLATILE MEMORY ELECTRONIC DEVICE MONOLITHICALLY INTEGRATED ON SEMICONCTOR
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Patent #:
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Issue Dt:
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03/06/2012
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11595055
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11/09/2006
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Publication #:
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Pub Dt:
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05/15/2008
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Title:
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READ WINDOW IN CHALCOGENIDE SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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11636382
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Filing Dt:
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12/08/2006
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Publication #:
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Pub Dt:
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06/28/2007
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Title:
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METHOD FOR PROGRAMMING OF MEMORY CELLS, IN PARTICULAR OF THE FLASH TYPE, AND CORRESPONDING PROGRAMMING ARCHITECTURE
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Patent #:
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Issue Dt:
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12/09/2008
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Application #:
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11638321
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12/13/2006
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Publication #:
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Pub Dt:
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07/12/2007
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Title:
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OUTPUT BUFFER
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Patent #:
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Issue Dt:
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03/31/2009
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11713074
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02/28/2007
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Pub Dt:
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01/10/2008
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Title:
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ELECTRONIC DEVICE COMPRISING NON VOLATILE MEMORY CELLS WITH OPTIMIZED PROGRAMMING AND CORRESPONDING PROGRAMMING METHOD
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Patent #:
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Issue Dt:
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01/19/2010
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11713081
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02/28/2007
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Pub Dt:
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11/29/2007
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Title:
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NON VOLATILE MEMORY DEVICE ARCHITECTURE AND CORRESPONDING PROGRAMMING METHOD
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Issue Dt:
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03/30/2010
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11732486
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04/02/2007
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Pub Dt:
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10/25/2007
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Title:
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METHOD FOR PROGRAMMING A MEMORY DEVICE SUITABLE TO MINIMIZE FLOATING GATE COUPLING AND MEMORY DEVICE
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06/23/2009
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11741462
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04/27/2007
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Pub Dt:
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10/30/2008
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Title:
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REFERENCE CELL LAYOUT WITH ENHANCED RTN IMMUNITY
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Issue Dt:
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07/28/2009
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Application #:
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11771677
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06/29/2007
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Publication #:
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Pub Dt:
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01/17/2008
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Title:
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AUTOMATIC REGULATION METHOD FOR THE REFERENCE SOURCES IN A NON-VOLATILE MEMORY DEVICE AND CORRESPONDING MEMORY DEVICE
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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11787101
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04/13/2007
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Publication #:
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Pub Dt:
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12/06/2007
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Title:
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OPTIMIZED FLASH MEMORY ACCESS METHOD AND DEVICE
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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11823518
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Filing Dt:
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06/28/2007
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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HIGH DENSITY NOR FLASH ARRAY ARCHITECTURE
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Issue Dt:
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02/02/2010
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Application #:
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12104118
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04/16/2008
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Publication #:
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Pub Dt:
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10/23/2008
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Title:
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METHOD AND CIRCUIT FOR PROGRAMMING A MEMORY CELL, IN PARTICULAR OF THE NOR FLASH TYPE
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Patent #:
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Issue Dt:
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07/13/2010
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Application #:
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12287073
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10/06/2008
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Pub Dt:
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06/04/2009
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Title:
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FABRICATING SUB-LITHOGRAPHIC CONTACTS
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Patent #:
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Issue Dt:
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09/23/2014
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Application #:
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12326165
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Filing Dt:
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12/02/2008
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Publication #:
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Pub Dt:
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06/03/2010
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Title:
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PASSWORD PROTECTED BUILT-IN TEST MODE FOR MEMORIES
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07/29/2014
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12329740
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12/08/2008
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06/10/2010
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07/28/2015
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12331772
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12/10/2008
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06/10/2010
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Title:
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Non-Volatile Memory Device Capable of Initiating Transactions
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01/25/2011
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12333530
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12/12/2008
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06/17/2010
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11/22/2011
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12335587
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12/16/2008
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06/17/2010
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01/17/2012
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06/24/2010
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05/28/2013
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12/22/2008
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06/24/2010
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06/24/2010
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07/03/2012
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06/24/2010
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03/29/2011
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06/24/2010
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05/03/2011
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03/05/2009
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05/19/2015
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09/30/2010
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06/16/2015
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03/26/2009
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07/26/2016
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12/11/2009
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12/30/2009
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10/29/2013
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03/16/2010
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09/10/2013
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05/06/2010
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09/09/2014
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05/11/2010
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11/17/2011
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05/13/2010
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09/02/2010
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11/24/2015
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05/19/2010
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FORMING SELF-ALIGNED CONDUCTIVE LINES FOR RESISTIVE RANDOM ACCESS MEMORIES
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09/10/2013
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07/01/2010
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10/14/2014
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07/15/2010
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Resistive Random Access Memory
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10/29/2013
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08/04/2010
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02/09/2012
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04/08/2014
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13142487
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11/03/2011
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09/17/2013
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11/24/2011
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OPTIMIZED FLASH MEMORY ACCESS METHOD AND DEVICE
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