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Patent Assignment Details
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Reel/Frame:026216/0682   Pages: 17
Recorded: 04/27/2011
Attorney Dkt #:001701.00080
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE BRIEF DECRIPTION FROM "CHARGE OF ASSIGNEE ADDRESS" AND ASSIGNOR FROM "FUJITSU LIMITED" PREVIOUSLY RECORDED ON REEL 025329 FRAME 0369.
Total properties: 6
1
Patent #:
Issue Dt:
11/06/2001
Application #:
09641139
Filing Dt:
08/16/2000
Title:
Synchronizing circuit for generating internal signal synchronized to external signal
2
Patent #:
Issue Dt:
12/25/2001
Application #:
09707791
Filing Dt:
11/08/2000
Title:
Analog synchronization circuit
3
Patent #:
Issue Dt:
09/17/2002
Application #:
09871646
Filing Dt:
06/04/2001
Publication #:
Pub Dt:
12/06/2001
Title:
SEMICONDUCTOR MEMORY DEVICE HAVING SEGMENT TYPE WORD LINE STRUCTURE
4
Patent #:
Issue Dt:
11/26/2002
Application #:
09898033
Filing Dt:
07/05/2001
Publication #:
Pub Dt:
01/10/2002
Title:
SEMICONDUCTOR DEVICE
5
Patent #:
Issue Dt:
04/15/2003
Application #:
10007694
Filing Dt:
12/10/2001
Publication #:
Pub Dt:
09/12/2002
Title:
DIGITAL-TO-ANALOG CONVERTER AND SYNCHRONOUS CIRCUIT USING THE CONVERTER
6
Patent #:
Issue Dt:
11/18/2003
Application #:
10103141
Filing Dt:
03/22/2002
Publication #:
Pub Dt:
10/03/2002
Title:
SEMICONDUCTOR MEMORY DEVICE WITH REDUCED ITS CHIP AREA AND POWER CONSUMPTION
Assignor
1
Exec Dt:
04/28/2010
Assignee
1
2-10-23 SHIN YOKOHAMA, KOHOKU-KU
YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033
Correspondence name and address
BANNER & WITCOFF, LTD.
1100 13TH STREET NW
SUITE 1200
WASHINGTON, DISTRICT OF COLUMBIA 20005

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