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Patent Assignment Details
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Reel/Frame:006675/0686   Pages: 3
Recorded: 08/26/1993
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
11/29/1994
Application #:
08112126
Filing Dt:
08/26/1993
Title:
STACK CAPACITOR DRAM CELL WITH BURIED BIT-LINE AND METHOD OF MANUFACTURE
Assignor
1
Exec Dt:
08/09/1993
Assignee
1
NO. 13 INNOVATION RD.I SCIENCE BASED INDUSTRIAL PARK
HSINCHU, TAIWAN, R.O.C.
TAIWAN
Correspondence name and address
GEORGE O. SAILE
20 MCINTOSH DR.
POUGHKEEPSIE, NY 12603

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