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Reel/Frame:	061827/0686			Pages:	161
		Recorded:	11/01/2022
Attorney Dkt #:	INTEL TO TAHOE ASSIGNMENT
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 538
Page 1 of 6
Pages: 1 2 3 4 5 6

Patent #:	7330209	Issue Dt:	02/12/2008	Application #:	09745132	Filing Dt:	12/20/2000
Publication #:	US20020012054	Pub Dt:	01/31/2002
Title:	DIGITAL STILL CAMERA SYSTEM AND COMPLEMENTARY-COLOR-FILTERED ARRAY INTERPOLATION METHOD

Patent #:	NONE	Issue Dt:		Application #:	09752644	Filing Dt:	12/29/2000
Publication #:	US20020086719	Pub Dt:	07/04/2002
Title:	Low power subsystem for portable computers

Patent #:	6914839	Issue Dt:	07/05/2005	Application #:	10035878	Filing Dt:	12/24/2001
Publication #:	US20030120964	Pub Dt:	06/26/2003
Title:	SELF-TIMED SNEAK CURRENT CANCELLATION

Patent #:	7181594	Issue Dt:	02/20/2007	Application #:	10057723	Filing Dt:	01/25/2002
Publication #:	US20030145173	Pub Dt:	07/31/2003
Title:	CONTEXT PIPELINES

Patent #:	7752256	Issue Dt:	07/06/2010	Application #:	10092010	Filing Dt:	03/05/2002
Publication #:	US20030195923	Pub Dt:	10/16/2003
Title:	PRESENTATION SERVER

Patent #:	7404012	Issue Dt:	07/22/2008	Application #:	10186188	Filing Dt:	06/28/2002
Publication #:	US20030208631	Pub Dt:	11/06/2003
Title:	SYSTEM AND METHOD FOR DYNAMIC LINK AGGREGATION IN A SHARED I/O SUBSYSTEM

Patent #:	7143196	Issue Dt:	11/28/2006	Application #:	10186190	Filing Dt:	06/28/2002
Publication #:	US20030217183	Pub Dt:	11/20/2003
Title:	SYSTEM AND METHOD FOR SPAN PORT CONFIGURATION

Patent #:	7197572	Issue Dt:	03/27/2007	Application #:	10186333	Filing Dt:	06/28/2002
Publication #:	US20030208551	Pub Dt:	11/06/2003
Title:	SYSTEM AND METHOD FOR IMPLEMENTING LOGICAL SWITCHES IN A NETWORK SYSTEM

Patent #:	7180972	Issue Dt:	02/20/2007	Application #:	10273899	Filing Dt:	10/16/2002
Title:	CLOCK SIGNAL CIRCUITRY FOR MULTI-PROTOCOL HIGH-SPEED SERIAL INTERFACE CIRCUITRY

Patent #:	7036046	Issue Dt:	04/25/2006	Application #:	10295265	Filing Dt:	11/14/2002
Publication #:	US20040098638	Pub Dt:	05/20/2004
Title:	PLD DEBUGGING HUB

Patent #:	6952375	Issue Dt:	10/04/2005	Application #:	10322292	Filing Dt:	12/17/2002
Publication #:	US20030120965	Pub Dt:	06/26/2003
Title:	SELF-TIMED VOLTAGE-SUBTRACTION SNEAK CURRENT CANCELLATION METHOD AND APPARATUS

Patent #:	NONE	Issue Dt:		Application #:	10335112	Filing Dt:	12/31/2002
Publication #:	US20030095790	Pub Dt:	05/22/2003
Title:	Methods and apparatus for generating navigation information on the fly

Patent #:	6798240	Issue Dt:	09/28/2004	Application #:	10351026	Filing Dt:	01/24/2003
Title:	LOGIC CIRCUITRY WITH SHARED LOOKUP TABLE

Patent #:	NONE	Issue Dt:		Application #:	10356435	Filing Dt:	01/31/2003
Publication #:	US20040154010	Pub Dt:	08/05/2004
Title:	Control-quasi-independent-points guided speculative multithreading

Patent #:	7254730	Issue Dt:	08/07/2007	Application #:	10367076	Filing Dt:	02/14/2003
Publication #:	US20040163004	Pub Dt:	08/19/2004
Title:	METHOD AND APPARATUS FOR A USER TO INTERFACE WITH A MOBILE COMPUTING DEVICE

Patent #:	7523465	Issue Dt:	04/21/2009	Application #:	10422528	Filing Dt:	04/24/2003
Publication #:	US20040154019	Pub Dt:	08/05/2004
Title:	METHODS AND APPARATUS FOR GENERATING SPECULATIVE HELPER THREAD SPAWN-TARGET POINTS

Patent #:	6894531	Issue Dt:	05/17/2005	Application #:	10444741	Filing Dt:	05/22/2003
Title:	INTERFACE FOR A PROGRAMMABLE LOGIC DEVICE

Patent #:	6867616	Issue Dt:	03/15/2005	Application #:	10455773	Filing Dt:	06/04/2003
Title:	PROGRAMMABLE LOGIC DEVICE SERIAL INTERFACE HAVING DUAL-USE PHASE-LOCKED LOOP CIRCUITRY

Patent #:	NONE	Issue Dt:		Application #:	10600048	Filing Dt:	06/19/2003
Publication #:	US20040257372	Pub Dt:	12/23/2004
Title:	Communication ports in a data driven architecture

Patent #:	6842034	Issue Dt:	01/11/2005	Application #:	10612253	Filing Dt:	07/01/2003
Title:	SELECTABLE DYNAMIC RECONFIGURATION OF PROGRAMMABLE EMBEDDED IP

Patent #:	6888238	Issue Dt:	05/03/2005	Application #:	10616858	Filing Dt:	07/09/2003
Title:	LOW WARPAGE FLIP CHIP PACKAGE SOLUTION-CHANNEL HEAT SPREADER

Patent #:	7289542	Issue Dt:	10/30/2007	Application #:	10624955	Filing Dt:	07/22/2003
Publication #:	US20040156465	Pub Dt:	08/12/2004
Title:	METHOD FOR OPERATING A PLL FREQUENCY SYNTHESIS CIRCUIT

Patent #:	7539900	Issue Dt:	05/26/2009	Application #:	10629508	Filing Dt:	07/29/2003
Title:	EMBEDDED MICROPROCESSOR FOR INTEGRATED CIRCUIT TESTING AND DEBUGGING

Patent #:	6897543	Issue Dt:	05/24/2005	Application #:	10646013	Filing Dt:	08/22/2003
Title:	ELECTRICALLY-PROGRAMMABLE INTEGRATED CIRCUIT ANTIFUSES

Patent #:	7030646	Issue Dt:	04/18/2006	Application #:	10654518	Filing Dt:	09/02/2003
Title:	FUNCTIONAL PRE-CONFIGURATION OF A PROGRAMMABLE LOGIC DEVICE

Patent #:	6864704	Issue Dt:	03/08/2005	Application #:	10669298	Filing Dt:	09/24/2003
Title:	ADJUSTABLE DIFFERENTIAL INPUT AND OUTPUT DRIVERS

Patent #:	6943588	Issue Dt:	09/13/2005	Application #:	10670146	Filing Dt:	09/24/2003
Title:	DYNAMICALLY-ADJUSTABLE DIFFERENTIAL OUTPUT DRIVERS

Patent #:	6828822	Issue Dt:	12/07/2004	Application #:	10678798	Filing Dt:	10/03/2003
Title:	APPARATUS AND METHODS FOR SHARED MEMORY INTERFACES IN PROGRAMMABLE LOGIC DEVICES

Patent #:	6924678	Issue Dt:	08/02/2005	Application #:	10691152	Filing Dt:	10/21/2003
Publication #:	US20050083089	Pub Dt:	04/21/2005
Title:	PROGRAMMABLE PHASE-LOCKED LOOP CIRCUITRY FOR PROGRAMMABLE LOGIC DEVICE

Patent #:	6831582	Issue Dt:	12/14/2004	Application #:	10691507	Filing Dt:	10/24/2003
Publication #:	US20040135714	Pub Dt:	07/15/2004
Title:	METHOD AND CIRCUIT CONFIGURATION FOR MIXING A DIGITAL SIGNAL WITH AN ANALOGUE SIGNAL

Patent #:	NONE	Issue Dt:		Application #:	10718369	Filing Dt:	11/19/2003
Publication #:	US20050108534	Pub Dt:	05/19/2005
Title:	Providing services to an open platform implementing subscriber identity module (SIM) capabilities

Patent #:	NONE	Issue Dt:		Application #:	10728676	Filing Dt:	12/04/2003
Publication #:	US20050122904	Pub Dt:	06/09/2005
Title:	Preventative congestion control for application support

Patent #:	7558806	Issue Dt:	07/07/2009	Application #:	10736452	Filing Dt:	12/14/2003
Publication #:	US20050132417	Pub Dt:	06/16/2005
Title:	METHOD AND APPARATUS FOR BUFFERING STREAMING MEDIA

Patent #:	7003423	Issue Dt:	02/21/2006	Application #:	10741593	Filing Dt:	12/18/2003
Title:	PROGRAMMABLE LOGIC RESOURCE WITH DATA TRANSFER SYNCHRONIZATION

Patent #:	7363517	Issue Dt:	04/22/2008	Application #:	10741641	Filing Dt:	12/19/2003
Publication #:	US20050138438	Pub Dt:	06/23/2005
Title:	METHODS AND APPARATUS TO MANAGE SYSTEM POWER AND PERFORMANCE

Patent #:	7570654	Issue Dt:	08/04/2009	Application #:	10744199	Filing Dt:	12/22/2003
Publication #:	US20050135356	Pub Dt:	06/23/2005
Title:	SWITCHING DEVICE UTILIZING REQUESTS INDICATING CUMULATIVE AMOUNT OF DATA

Patent #:	NONE	Issue Dt:		Application #:	10746919	Filing Dt:	12/24/2003
Publication #:	US20050149729	Pub Dt:	07/07/2005
Title:	Method to support XML-based security and key management services in a pre-boot execution environment

Patent #:	7153734	Issue Dt:	12/26/2006	Application #:	10748559	Filing Dt:	12/29/2003
Publication #:	US20050148136	Pub Dt:	07/07/2005
Title:	CMOS DEVICE WITH METAL AND SILICIDE GATE ELECTRODES AND A METHOD FOR MAKING IT

Patent #:	7115987	Issue Dt:	10/03/2006	Application #:	10750234	Filing Dt:	12/31/2003
Publication #:	US20050139992	Pub Dt:	06/30/2005
Title:	INTEGRATED STACKED MICROCHANNEL HEAT EXCHANGER AND HEAT SPREADER

Patent #:	7190190	Issue Dt:	03/13/2007	Application #:	10754432	Filing Dt:	01/09/2004
Title:	PROGRAMMABLE LOGIC DEVICE WITH ON-CHIP NONVOLATILE USER MEMORY

Patent #:	7636441	Issue Dt:	12/22/2009	Application #:	10756444	Filing Dt:	01/12/2004
Publication #:	US20050154890	Pub Dt:	07/14/2005
Title:	METHOD FOR SECURE KEY EXCHANGE

Patent #:	7230302	Issue Dt:	06/12/2007	Application #:	10767684	Filing Dt:	01/29/2004
Publication #:	US20050167756	Pub Dt:	08/04/2005
Title:	LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

Patent #:	NONE	Issue Dt:		Application #:	10774813	Filing Dt:	02/09/2004
Publication #:	US20050175183	Pub Dt:	08/11/2005
Title:	Method and architecture for secure transmission of data within optical switched networks

Patent #:	7009533	Issue Dt:	03/07/2006	Application #:	10778880	Filing Dt:	02/13/2004
Title:	ADAPTIVE COMPRESSION AND DECOMPRESSION OF BANDLIMITED SIGNALS

Patent #:	7088276	Issue Dt:	08/08/2006	Application #:	10778881	Filing Dt:	02/13/2004
Title:	ENHANCED DATA CONVERTERS USING COMPRESSION AND DECOMPRESSION

Patent #:	7437401	Issue Dt:	10/14/2008	Application #:	10783820	Filing Dt:	02/20/2004
Publication #:	US20050187998	Pub Dt:	08/25/2005
Title:	MULTIPLIER-ACCUMULATOR BLOCK MODE SPLITTING

Patent #:	7467176	Issue Dt:	12/16/2008	Application #:	10783829	Filing Dt:	02/20/2004
Publication #:	US20050187999	Pub Dt:	08/25/2005
Title:	SATURATION AND ROUNDING IN MULTIPLY-ACCUMULATE BLOCKS

Patent #:	7318150	Issue Dt:	01/08/2008	Application #:	10786284	Filing Dt:	02/25/2004
Publication #:	US20050262571	Pub Dt:	11/24/2005
Title:	SYSTEM AND METHOD TO SUPPORT PLATFORM FIRMWARE AS A TRUSTED PROCESS

Patent #:	NONE	Issue Dt:		Application #:	10793707	Filing Dt:	03/03/2004
Publication #:	US20050198088	Pub Dt:	09/08/2005
Title:	Parallelizing mark-sweep-compact garbage collections

Patent #:	6853603	Issue Dt:	02/08/2005	Application #:	10797493	Filing Dt:	03/09/2004
Title:	PROGRAMMABLE LOGIC DEVICE HAVING NONVOLATILE MEMORY WITH USER SELECTABLE POWER CONSUMPTION

Patent #:	7098707	Issue Dt:	08/29/2006	Application #:	10797836	Filing Dt:	03/09/2004
Publication #:	US20050200390	Pub Dt:	09/15/2005
Title:	HIGHLY CONFIGURABLE PLL ARCHITECTURE FOR PROGRAMMABLE LOGIC

Patent #:	6933869	Issue Dt:	08/23/2005	Application #:	10802590	Filing Dt:	03/17/2004
Title:	INTEGRATED CIRCUITS WITH TEMPERATURE-CHANGE AND THRESHOLD-VOLTAGE DRIFT COMPENSATION

Patent #:	NONE	Issue Dt:		Application #:	10804487	Filing Dt:	03/18/2004
Publication #:	US20050177749	Pub Dt:	08/11/2005
Title:	Method and architecture for security key generation and distribution within optical switched networks

Patent #:	NONE	Issue Dt:		Application #:	10804674	Filing Dt:	03/18/2004
Publication #:	US20050207436	Pub Dt:	09/22/2005
Title:	Switching device based on aggregation of packets

Patent #:	7574600	Issue Dt:	08/11/2009	Application #:	10808973	Filing Dt:	03/24/2004
Publication #:	US20050216736	Pub Dt:	09/29/2005
Title:	SYSTEM AND METHOD FOR COMBINING USER AND PLATFORM AUTHENTICATION IN NEGOTIATED CHANNEL SECURITY PROTOCOLS

Patent #:	NONE	Issue Dt:		Application #:	10809315	Filing Dt:	03/24/2004
Publication #:	US20050213768	Pub Dt:	09/29/2005
Title:	Shared cryptographic key in networks with an embedded agent

Patent #:	7606960	Issue Dt:	10/20/2009	Application #:	10810026	Filing Dt:	03/26/2004
Publication #:	US20050216643	Pub Dt:	09/29/2005
Title:	APPARATUS FOR ADJUSTING A CLOCK FREQUENCY OF A VARIABLE SPEED BUS

Patent #:	7167022	Issue Dt:	01/23/2007	Application #:	10810117	Filing Dt:	03/25/2004
Title:	OMNIBUS LOGIC ELEMENT INCLUDING LOOK UP TABLE BASED LOGIC ELEMENTS

Patent #:	7440532	Issue Dt:	10/21/2008	Application #:	10830277	Filing Dt:	04/21/2004
Title:	BIT SLIP CIRCUITRY FOR SERIAL DATA SIGNALS

Patent #:	7075365	Issue Dt:	07/11/2006	Application #:	10830562	Filing Dt:	04/22/2004
Title:	CONFIGURABLE CLOCK NETWORK FOR PROGRAMMABLE LOGIC DEVICE

Patent #:	7348827	Issue Dt:	03/25/2008	Application #:	10848953	Filing Dt:	05/19/2004
Publication #:	US20050258862	Pub Dt:	11/24/2005
Title:	APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE OF PROGRAMMABLE LOGIC DEVICES

Patent #:	7112997	Issue Dt:	09/26/2006	Application #:	10849074	Filing Dt:	05/19/2004
Title:	APPARATUS AND METHODS FOR MULTI-GATE SILICON-ON-INSULATOR TRANSISTORS

Patent #:	7165229	Issue Dt:	01/16/2007	Application #:	10852832	Filing Dt:	05/24/2004
Title:	GENERATING OPTIMIZED AND SECURE IP CORES

Patent #:	6972987	Issue Dt:	12/06/2005	Application #:	10856187	Filing Dt:	05/27/2004
Title:	TECHNIQUES FOR REDUCING POWER CONSUMPTION IN MEMORY CELLS

Patent #:	7126399	Issue Dt:	10/24/2006	Application #:	10857221	Filing Dt:	05/27/2004
Title:	MEMORY INTERFACE PHASE-SHIFT CIRCUITRY TO SUPPORT MULTIPLE FREQUENCY RANGES

Patent #:	7176714	Issue Dt:	02/13/2007	Application #:	10857396	Filing Dt:	05/27/2004
Title:	MULTIPLE DATA RATE MEMORY INTERFACE ARCHITECTURE

Patent #:	7409652	Issue Dt:	08/05/2008	Application #:	10861893	Filing Dt:	06/04/2004
Title:	DEBUGGABLE OPAQUE IP

Patent #:	7129745	Issue Dt:	10/31/2006	Application #:	10865402	Filing Dt:	06/10/2004
Publication #:	US20050280437	Pub Dt:	12/22/2005
Title:	APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE OF INTEGRATED CIRCUITS

Patent #:	NONE	Issue Dt:		Application #:	10881095	Filing Dt:	06/29/2004
Publication #:	US20050284371	Pub Dt:	12/29/2005
Title:	Deposition apparatus for providing uniform low-k dielectric

Patent #:	7193432	Issue Dt:	03/20/2007	Application #:	10882579	Filing Dt:	06/30/2004
Title:	VPA LOGIC CIRCUITS

Patent #:	7157933	Issue Dt:	01/02/2007	Application #:	10882583	Filing Dt:	06/30/2004
Title:	CONFIGURABLE CIRCUITS, IC'S, AND SYSTEMS

Patent #:	7126373	Issue Dt:	10/24/2006	Application #:	10882839	Filing Dt:	06/30/2004
Title:	CONFIGURABLE LOGIC CIRCUITS WITH COMMUTATIVE PROPERTIES

Patent #:	7193440	Issue Dt:	03/20/2007	Application #:	10882946	Filing Dt:	06/30/2004
Title:	CONFIGURABLE CIRCUITS, IC'S, AND SYSTEMS

Patent #:	7167025	Issue Dt:	01/23/2007	Application #:	10883051	Filing Dt:	06/30/2004
Title:	NON-SEQUENTIALLY CONFIGURABLE IC

Patent #:	7126381	Issue Dt:	10/24/2006	Application #:	10883213	Filing Dt:	06/30/2004
Title:	VPA INTERCONNECT CIRCUIT

Patent #:	7109752	Issue Dt:	09/19/2006	Application #:	10883276	Filing Dt:	06/30/2004
Title:	CONFIGURABLE CIRCUITS, IC'S, AND SYSTEMS

Patent #:	7425841	Issue Dt:	09/16/2008	Application #:	10883486	Filing Dt:	06/30/2004
Publication #:	US20070241771	Pub Dt:	10/18/2007
Title:	CONFIGURABLE CIRCUITS, IC'S, AND SYSTEMS

Patent #:	7317330	Issue Dt:	01/08/2008	Application #:	10891827	Filing Dt:	07/14/2004
Publication #:	US20050030062	Pub Dt:	02/10/2005
Title:	LOGIC CIRCUITRY WITH SHARED LOOKUP TABLE

Patent #:	7251561	Issue Dt:	07/31/2007	Application #:	10900707	Filing Dt:	07/28/2004
Publication #:	US20060025923	Pub Dt:	02/02/2006
Title:	SELECTIVE DOWNLOAD OF CORRIDOR MAP DATA

Patent #:	7015544	Issue Dt:	03/21/2006	Application #:	10924003	Filing Dt:	08/23/2004
Publication #:	US20060038225	Pub Dt:	02/23/2006
Title:	INTEGRATED CIRCUIT EMPLOYABLE WITH A POWER CONVERTER

Patent #:	7335948	Issue Dt:	02/26/2008	Application #:	10924088	Filing Dt:	08/23/2004
Publication #:	US20060038237	Pub Dt:	02/23/2006
Title:	INTEGRATED CIRCUIT INCORPORATING HIGHER VOLTAGE DEVICES AND LOW VOLTAGE DEVICES THEREIN

Patent #:	7190026	Issue Dt:	03/13/2007	Application #:	10924091	Filing Dt:	08/23/2004
Publication #:	US20060039224	Pub Dt:	02/23/2006
Title:	INTEGRATED CIRCUIT EMPLOYABLE WITH A POWER CONVERTER

Patent #:	7195981	Issue Dt:	03/27/2007	Application #:	10924381	Filing Dt:	08/23/2004
Publication #:	US20060040451	Pub Dt:	02/23/2006
Title:	METHOD OF FORMING AN INTEGRATED CIRCUIT EMPLOYABLE WITH A POWER CONVERTER

Patent #:	7229886	Issue Dt:	06/12/2007	Application #:	10924461	Filing Dt:	08/23/2004
Publication #:	US20060040452	Pub Dt:	02/23/2006
Title:	METHOD OF FORMING AN INTEGRATED CIRCUIT INCORPORATING HIGHER VOLTAGE DEVICES AND LOW VOLTAGE DEVICES THEREIN

Patent #:	7232733	Issue Dt:	06/19/2007	Application #:	10924469	Filing Dt:	08/23/2004
Publication #:	US20060040449	Pub Dt:	02/23/2006
Title:	METHOD OF FORMING AN INTEGRATED CIRCUIT INCORPORATING HIGHER VOLTAGE DEVICES AND LOW VOLTAGE DEVICES THEREIN

Patent #:	NONE	Issue Dt:		Application #:	10936952	Filing Dt:	09/08/2004
Publication #:	US20060053258	Pub Dt:	03/09/2006
Title:	Cache filtering using core indicators

Patent #:	7236018	Issue Dt:	06/26/2007	Application #:	10937518	Filing Dt:	09/08/2004
Title:	PROGRAMMABLE LOW-VOLTAGE DIFFERENTIAL SIGNALING OUTPUT DRIVER

Patent #:	7414637	Issue Dt:	08/19/2008	Application #:	10938075	Filing Dt:	09/10/2004
Publication #:	US20060058949	Pub Dt:	03/16/2006
Title:	PLACEMENT OF MAP LABELS

Patent #:	7142009	Issue Dt:	11/28/2006	Application #:	10942692	Filing Dt:	09/15/2004
Title:	ADAPTIVE POWER SUPPLY VOLTAGE REGULATION FOR PROGRAMMABLE LOGIC

Patent #:	7183797	Issue Dt:	02/27/2007	Application #:	10977952	Filing Dt:	10/29/2004
Publication #:	US20060095613	Pub Dt:	05/04/2006
Title:	NEXT GENERATION 8B10B ARCHITECTURE

Patent #:	7071726	Issue Dt:	07/04/2006	Application #:	11005390	Filing Dt:	12/01/2004
Title:	SELECTABLE DYNAMIC RECONFIGURATION OF PROGRAMMABLE EMBEDDED IP

Patent #:	NONE	Issue Dt:		Application #:	11006420	Filing Dt:	12/07/2004
Publication #:	US20060119382	Pub Dt:	06/08/2006
Title:	Apparatus and methods for adjusting performance characteristics of programmable logic devices

Patent #:	7430265	Issue Dt:	09/30/2008	Application #:	11018379	Filing Dt:	12/21/2004
Publication #:	US20050185749	Pub Dt:	08/25/2005
Title:	CIRCUIT ARRANGEMENT PROVIDED WITH A PHASE-LOCKED LOOP AND TRANSMITTER-RECEIVER WITH SAID CIRCUIT ARRANGEMENT

Patent #:	7477641	Issue Dt:	01/13/2009	Application #:	11026652	Filing Dt:	12/30/2004
Publication #:	US20060159103	Pub Dt:	07/20/2006
Title:	PROVIDING ACCESS TO DATA SHARED BY PACKET PROCESSING THREADS

Patent #:	6972588	Issue Dt:	12/06/2005	Application #:	11029275	Filing Dt:	01/05/2005
Title:	ADJUSTABLE DIFFERENTIAL INPUT AND OUTPUT DRIVERS

Patent #:	7227395	Issue Dt:	06/05/2007	Application #:	11055125	Filing Dt:	02/09/2005
Title:	HIGH-PERFORMANCE MEMORY INTERFACE CIRCUIT ARCHITECTURE

Patent #:	7242221	Issue Dt:	07/10/2007	Application #:	11056442	Filing Dt:	02/11/2005
Title:	SELECTABLE INVERSION OF DIFFERENTIAL INPUT AND/OR OUTPUT PINS IN PROGRAMMABLE LOGIC DEVICES

Patent #:	7248070	Issue Dt:	07/24/2007	Application #:	11059929	Filing Dt:	02/16/2005
Title:	METHOD AND SYSTEM FOR USING BOUNDARY SCAN IN A PROGRAMMABLE LOGIC DEVICE

Patent #:	7272067	Issue Dt:	09/18/2007	Application #:	11060925	Filing Dt:	02/18/2005
Title:	ELECTRICALLY-PROGRAMMABLE INTEGRATED CIRCUIT ANTIFUSES

100

Patent #:	7230869	Issue Dt:	06/12/2007	Application #:	11081870	Filing Dt:	03/15/2005
Title:	METHOD AND APPARATUS FOR ACCESSING CONTENTS OF MEMORY CELLS

Assignor

INTEL CORPORATION

Exec Dt:

07/18/2022

Assignee

TAHOE RESEARCH, LTD.

BLANCHARDSTOWN CORPORATE PARK 2

PLAZA 255, SUITE 2A

DUBLIN, IRELAND D15 YH6H

Correspondence name and address
	TAHOE RESEARCH, LTD.
	BLANCHARDSTOWN CORPORATE PARK 2
	PLAZA 255, SUITE 2A
	DUBLIN, D15 YH6H IRELAND

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