USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	027234/0693			Pages:	20
		Recorded:	11/16/2011
Attorney Dkt #:	HYNIX
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 30

Patent #:	5654223	Issue Dt:	08/05/1997	Application #:	08495270	Filing Dt:	06/27/1995
Title:	METHOD FOR FABRICATING SEMICONDUCTOR MEMORY ELEMENT

Patent #:	5994200	Issue Dt:	11/30/1999	Application #:	08898574	Filing Dt:	07/22/1997
Title:	A TRENCH ISOLATION STRUCTURE OF A SEMICONDUCTOR DEVICE AND A METHOD FOR THEREOF

Patent #:	5985734	Issue Dt:	11/16/1999	Application #:	08979235	Filing Dt:	11/26/1997
Title:	A METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

Patent #:	6162664	Issue Dt:	12/19/2000	Application #:	09168886	Filing Dt:	10/09/1998
Title:	METHOD FOR FABRICATING A SURFACE MOUNTING TYPE SEMICONDUCTOR CHIP PACKAGE

Patent #:	6262467	Issue Dt:	07/17/2001	Application #:	09410613	Filing Dt:	10/01/1999
Title:	ETCH BARRIER STRUCTURE OF A SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Patent #:	6458627	Issue Dt:	10/01/2002	Application #:	09415267	Filing Dt:	10/12/1999
Title:	SEMICONDUCTOR CHIP PACKAGE AND METHOD OF FABRICATING SAME

Patent #:	6337256	Issue Dt:	01/08/2002	Application #:	09441206	Filing Dt:	11/16/1999
Title:	IMPURITY ION SEGREGATION PRECLUDING LAYER, FABRICATION METHOD THEREOF, ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICE USING THE IMPURITY ION SEGREGATION PRECLUDING LAYER AND FABRICATING METHOD THEREOF

Patent #:	6514826	Issue Dt:	02/04/2003	Application #:	09721636	Filing Dt:	11/27/2000
Title:	METHOD OF FORMING A GATE ELECTRODE IN A SEMICONDUCTOR DEVICE

Patent #:	6767788	Issue Dt:	07/27/2004	Application #:	10152843	Filing Dt:	05/23/2002
Publication #:	US20020185671	Pub Dt:	12/12/2002
Title:	SEMICONDUCTOR DEVICE HAVING A METAL INSULATOR METAL CAPACITOR

Patent #:	6856011	Issue Dt:	02/15/2005	Application #:	10232652	Filing Dt:	09/03/2002
Publication #:	US20030006499	Pub Dt:	01/09/2003
Title:	SEMICONDUCTOR CHIP PACKAGE AND METHOD OF FABRICATING SAME

Patent #:	7022599	Issue Dt:	04/04/2006	Application #:	10306335	Filing Dt:	11/27/2002
Publication #:	US20030119302	Pub Dt:	06/26/2003
Title:	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES

Patent #:	6944833	Issue Dt:	09/13/2005	Application #:	10329936	Filing Dt:	12/26/2002
Publication #:	US20040054977	Pub Dt:	03/18/2004
Title:	DELAY MODEL CIRCUIT FOR USE IN DELAY LOCKED LOOP

Patent #:	6894942	Issue Dt:	05/17/2005	Application #:	10334298	Filing Dt:	12/31/2002
Publication #:	US20030214870	Pub Dt:	11/20/2003
Title:	REFRESH CONTROL CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE

Patent #:	6855604	Issue Dt:	02/15/2005	Application #:	10617683	Filing Dt:	07/14/2003
Publication #:	US20040126948	Pub Dt:	07/01/2004
Title:	METHOD FOR FABRICATING METAL-OXIDE SEMICONDUCTOR TRANSISTOR

Patent #:	6964930	Issue Dt:	11/15/2005	Application #:	10739620	Filing Dt:	12/18/2003
Publication #:	US20040219802	Pub Dt:	11/04/2004
Title:	METHOD OF FABRICATING DIELECTRIC LAYER

Patent #:	7101791	Issue Dt:	09/05/2006	Application #:	10879133	Filing Dt:	06/30/2004
Publication #:	US20050142767	Pub Dt:	06/30/2005
Title:	METHOD FOR FORMING CONDUCTIVE LINE OF SEMICONDUCTOR DEVICE

Patent #:	7119015	Issue Dt:	10/10/2006	Application #:	10879220	Filing Dt:	06/30/2004
Publication #:	US20050142867	Pub Dt:	06/30/2005
Title:	METHOD FOR FORMING POLYSILICON PLUG OF SEMICONDUCTOR DEVICE

Patent #:	7316973	Issue Dt:	01/08/2008	Application #:	11002706	Filing Dt:	12/03/2004
Publication #:	US20060003582	Pub Dt:	01/05/2006
Title:	METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

Patent #:	7193906	Issue Dt:	03/20/2007	Application #:	11008672	Filing Dt:	12/10/2004
Publication #:	US20050174864	Pub Dt:	08/11/2005
Title:	VOLTAGE REGULATING CIRCUIT AND METHOD OF REGULATING VOLTAGE

Patent #:	7057964	Issue Dt:	06/06/2006	Application #:	11015421	Filing Dt:	12/20/2004
Publication #:	US20050141254	Pub Dt:	06/30/2005
Title:	SEMICONDUCTOR MEMORY DEVICE WITH EFFICIENT MULTIPLEXING OF I/O PAD IN MULTI-CHIP PACKAGE

Patent #:	7145821	Issue Dt:	12/05/2006	Application #:	11025800	Filing Dt:	12/28/2004
Publication #:	US20060092731	Pub Dt:	05/04/2006
Title:	SEMICONDUCTOR MEMORY DEVICE FOR LOW POWER SYSTEM

Patent #:	7154808	Issue Dt:	12/26/2006	Application #:	11125380	Filing Dt:	05/09/2005
Publication #:	US20060034139	Pub Dt:	02/16/2006
Title:	SEMICONDUCTOR MEMORY DEVICE FOR SIMULTANEOUSLY TESTING BLOCKS OF CELLS

Patent #:	7449965	Issue Dt:	11/11/2008	Application #:	11319718	Filing Dt:	12/29/2005
Publication #:	US20060146631	Pub Dt:	07/06/2006
Title:	SELF REFRESH OSCILLATOR AND OSCILLATION SIGNAL GENERATION METHOD OF THE SAME

Patent #:	7276451	Issue Dt:	10/02/2007	Application #:	11321628	Filing Dt:	12/30/2005
Publication #:	US20070026680	Pub Dt:	02/01/2007
Title:	METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Patent #:	7348255	Issue Dt:	03/25/2008	Application #:	11321925	Filing Dt:	12/28/2005
Publication #:	US20060292819	Pub Dt:	12/28/2006
Title:	SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

Patent #:	7351652	Issue Dt:	04/01/2008	Application #:	11444064	Filing Dt:	05/30/2006
Publication #:	US20060276028	Pub Dt:	12/07/2006
Title:	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Patent #:	7411839	Issue Dt:	08/12/2008	Application #:	11480877	Filing Dt:	07/06/2006
Publication #:	US20070127296	Pub Dt:	06/07/2007
Title:	DATA INPUT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND DATA INPUT METHOD THEREOF

Patent #:	7495469	Issue Dt:	02/24/2009	Application #:	11824165	Filing Dt:	06/28/2007
Publication #:	US20080074140	Pub Dt:	03/27/2008
Title:	ON-DIE TERMINATION CIRCUIT AND DRIVING METHOD THEREOF

Patent #:	7859347	Issue Dt:	12/28/2010	Application #:	12255074	Filing Dt:	10/21/2008
Publication #:	US20090045883	Pub Dt:	02/19/2009
Title:	SELF REFRESH OSCILLATOR AND OSCILLATION SIGNAL GENERATION METHOD OF THE SAME

Patent #:	7847584	Issue Dt:	12/07/2010	Application #:	12356514	Filing Dt:	01/20/2009
Publication #:	US20090128185	Pub Dt:	05/21/2009
Title:	ON-DIE TERMINATION CIRCUIT AND DRIVING METHOD THEREOF

Assignor

HYNIX SEMICONDUCTOR INC.

Exec Dt:

08/22/2011

Assignee

658868 N.B. INC.

44 CHIPMAN HILL

SUITE 1000

SAINT JOHN, NB, CANADA E2L 2A9

Correspondence name and address
	MOSAID CORPORATION LTD.
	5700 GRANITE PARKWAY
	SUITE 960
	PLANO, TX 75024

Search Results as of: 06/06/2024 03:00 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6