Patent Assignment Details
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For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 011284/0696 | |
| Pages: | 5 |
| | Recorded: | 11/14/2000 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
5
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Patent #:
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Issue Dt:
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11/10/1987
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Application #:
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06697092
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Filing Dt:
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01/31/1985
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Title:
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THIN-FILM ELECTRICAL CONNECTIONS FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/14/1987
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Application #:
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06747075
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Filing Dt:
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06/19/1985
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Title:
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QUAD-STATE CONTROL SIGNAL INPUT CIRCUIT
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Patent #:
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Issue Dt:
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10/06/1987
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Application #:
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06779388
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Filing Dt:
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09/20/1985
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Title:
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METHOD OF MAKING TRI-WELL CMOS BY SELF-ALIGNED PROCESS
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Patent #:
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Issue Dt:
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12/22/1987
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Application #:
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06787813
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Filing Dt:
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10/15/1985
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Title:
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TEMPERATURE COMPENSATED COMPLEMENTARY METAL-INSULATOR-SEMICONDUCTOR OSCILLATOR
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Patent #:
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Issue Dt:
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10/31/1989
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Application #:
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07257897
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Filing Dt:
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10/13/1988
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Title:
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CASCADE FET LOGIC CIRCUITS
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Assignee
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| 2300 BUCKSKIN ROAD |
| POCATELLO, IDAHO 83201 |
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Correspondence name and address
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MARK KUSNER CO., LPA
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MARK KUSNER
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HIGHLAND PLACE -SUITE 310
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6151 WILSON MILLS ROAD
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HIGHLAND HEIGHTS, OHIO 44143
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