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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:021510/0707   Pages: 19
Recorded: 09/10/2008
Attorney Dkt #:5455.005
Conveyance: SECURITY AGREEMENT
Total properties: 23
1
Patent #:
8484441
Issue Dt:
07/09/2013
Application #:
10813433
Filing Dt:
03/31/2004
Publication #:
US20050223197
Pub Dt:
10/06/2005
Title:
APPARATUS AND METHOD FOR SEPARATE ASYMMETRIC CONTROL PROCESSING AND DATA PATH PROCESSING IN A CONFIGURABLE DUAL PATH PROCESSOR THAT SUPPORTS INSTRUCTIONS HAVING DIFFERENT BIT WIDTHS
2
Patent #:
9047094
Issue Dt:
06/02/2015
Application #:
10813615
Filing Dt:
03/31/2004
Publication #:
US20050223196
Pub Dt:
10/06/2005
Title:
APPARATUS AND METHOD FOR SEPARATE ASYMMETRIC CONTROL PROCESSING AND DATA PATH PROCESSING IN A DUAL PATH PROCESSOR
3
Patent #:
7949856
Issue Dt:
05/24/2011
Application #:
10813628
Filing Dt:
03/31/2004
Publication #:
US20050223193
Pub Dt:
10/06/2005
Title:
METHOD AND APPARATUS FOR SEPARATE CONTROL PROCESSING AND DATA PATH PROCESSING IN A DUAL PATH PROCESSOR WITH A SHARED LOAD/STORE UNIT
4
Patent #:
7454684
Issue Dt:
11/18/2008
Application #:
10825212
Filing Dt:
04/16/2004
Publication #:
US20040260995
Pub Dt:
12/23/2004
Title:
APPARATUS AND METHOD FOR TURBO DECODER TERMINATION
5
Patent #:
7564274
Issue Dt:
07/21/2009
Application #:
11065904
Filing Dt:
02/24/2005
Publication #:
US20060186946
Pub Dt:
08/24/2006
Title:
DETECTING EXCESS CURRENT LEAKAGE OF A CMOS DEVICE
6
Patent #:
7287237
Issue Dt:
10/23/2007
Application #:
11066041
Filing Dt:
02/24/2005
Publication #:
US20060195810
Pub Dt:
08/31/2006
Title:
ALIGNED LOGIC CELL GRID AND INTERCONNECT ROUTING ARCHITECTURE
7
Patent #:
NONE
Issue Dt:
Application #:
11066712
Filing Dt:
02/24/2005
Publication #:
US20060190893
Pub Dt:
08/24/2006
Title:
Logic cell layout architecture with shared boundary
8
Patent #:
7266787
Issue Dt:
09/04/2007
Application #:
11067200
Filing Dt:
02/24/2005
Publication #:
US20060186478
Pub Dt:
08/24/2006
Title:
METHOD FOR OPTIMISING TRANSISTOR PERFORMANCE IN INTEGRATED CIRCUITS
9
Patent #:
7933405
Issue Dt:
04/26/2011
Application #:
11102266
Filing Dt:
04/08/2005
Publication #:
US20060227966
Pub Dt:
10/12/2006
Title:
DATA ACCESS AND PERMUTE UNIT
10
Patent #:
8966223
Issue Dt:
02/24/2015
Application #:
11122385
Filing Dt:
05/05/2005
Publication #:
US20060253689
Pub Dt:
11/09/2006
Title:
Apparatus and method for configurable processing
11
Patent #:
7424071
Issue Dt:
09/09/2008
Application #:
11168642
Filing Dt:
06/27/2005
Publication #:
US20060291593
Pub Dt:
12/28/2006
Title:
DECODER AND A METHOD FOR DETERMINING A DECODING RELIABILITY INDICATOR
12
Patent #:
8009777
Issue Dt:
08/30/2011
Application #:
11812116
Filing Dt:
06/15/2007
Publication #:
US20080310564
Pub Dt:
12/18/2008
Title:
PROCESSING DATA IN A DIGITAL COMMUNICATIONS SYSTEM
13
Patent #:
7583106
Issue Dt:
09/01/2009
Application #:
11957352
Filing Dt:
12/14/2007
Publication #:
US20090153194
Pub Dt:
06/18/2009
Title:
CLOCK CIRCUITRY
14
Patent #:
7577048
Issue Dt:
08/18/2009
Application #:
11967540
Filing Dt:
12/31/2007
Publication #:
US20090172459
Pub Dt:
07/02/2009
Title:
MEMORY INTERFACE
15
Patent #:
NONE
Issue Dt:
Application #:
11967618
Filing Dt:
12/31/2007
Publication #:
US20090172380
Pub Dt:
07/02/2009
Title:
BOOTING AN INTEGRATED CIRCUIT
16
Patent #:
9385895
Issue Dt:
07/05/2016
Application #:
12016629
Filing Dt:
01/18/2008
Publication #:
US20090110048
Pub Dt:
04/30/2009
Title:
Radio Receiver in a Wireless Communications System
17
Patent #:
8189653
Issue Dt:
05/29/2012
Application #:
12016640
Filing Dt:
01/18/2008
Publication #:
US20090110049
Pub Dt:
04/30/2009
Title:
RADIO RECEIVER IN A WIRELESS COMMUNICATIONS SYSTEM
18
Patent #:
9479215
Issue Dt:
10/25/2016
Application #:
12016652
Filing Dt:
01/18/2008
Publication #:
US20090110036
Pub Dt:
04/30/2009
Title:
Processing Digital Samples in a Wireless Receiver
19
Patent #:
8126451
Issue Dt:
02/28/2012
Application #:
12016663
Filing Dt:
01/18/2008
Publication #:
US20090111461
Pub Dt:
04/30/2009
Title:
SYNCHRONOUS CDMA COMMUNICATION SYSTEM
20
Patent #:
8244298
Issue Dt:
08/14/2012
Application #:
12016671
Filing Dt:
01/18/2008
Publication #:
US20090113429
Pub Dt:
04/30/2009
Title:
ALTERNATIVE SIGNAL PROCESSING FUNCTIONS IN A SOFTWARE MODEM
21
Patent #:
8682272
Issue Dt:
03/25/2014
Application #:
12016681
Filing Dt:
01/18/2008
Publication #:
US20090111413
Pub Dt:
04/30/2009
Title:
PROCESSING SIGNALS IN A WIRELESS COMMUNICATIONS ENVIRONMENT
22
Patent #:
9729224
Issue Dt:
08/08/2017
Application #:
12016688
Filing Dt:
01/18/2008
Publication #:
US20090111542
Pub Dt:
04/30/2009
Title:
Wireless Receiver with Receive Diversity
23
Patent #:
8654894
Issue Dt:
02/18/2014
Application #:
12667142
Filing Dt:
06/01/2010
Publication #:
US20100254445
Pub Dt:
10/07/2010
PCT #:
EP0857889
Title:
PROCESSING TRANSMISSIONS IN A WIRELESS COMMUNICATION SYSTEM
Assignor
1
ICERA, INC.
Exec Dt:
08/29/2008
Assignee
1
ETV CAPITAL SA
6 RUE PHILLIPPE II
L-2340 LUXEMBOURG, LUXEMBOURG
Correspondence name and address
GUNDERSON DETTMER
610 LINCOLN STREET
WALTHAM, MA 02451

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