Total properties:
30
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Patent #:
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Issue Dt:
|
02/20/2007
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Application #:
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09921377
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Filing Dt:
|
08/02/2001
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Title:
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READ-ONLY ACCESS TO CPO REGISTERS
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Patent #:
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Issue Dt:
|
02/27/2007
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Application #:
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09921400
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Filing Dt:
|
08/02/2001
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Title:
|
ATOMIC UPDATE OF CPO STATE
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Patent #:
|
|
Issue Dt:
|
06/23/2009
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Application #:
|
09977089
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Filing Dt:
|
10/12/2001
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Publication #:
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Pub Dt:
|
04/17/2003
| | | | |
Title:
|
CONFIGURABLE PRIORITIZATION OF CORE GENERATED INTERRUPTS
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Patent #:
|
|
Issue Dt:
|
02/14/2006
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Application #:
|
10238993
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Filing Dt:
|
09/06/2002
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR CLEARING HAZARDS USING JUMP INSTRUCTIONS
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Patent #:
|
|
Issue Dt:
|
05/20/2008
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Application #:
|
10684350
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Filing Dt:
|
10/10/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
|
MECHANISMS FOR ASSURING QUALITY OF SERVICE FOR PROGRAMS EXECUTING ON A MULTITHREADED PROCESSOR
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Patent #:
|
|
Issue Dt:
|
01/05/2010
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Application #:
|
10783960
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Filing Dt:
|
02/20/2004
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Title:
|
METHOD AND APPARATUS FOR GLOBAL ORDERING TO INSURE LATENCY INDEPENDENT COHERENCE
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|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
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Application #:
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10954988
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Filing Dt:
|
09/30/2004
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Publication #:
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Pub Dt:
|
08/09/2007
| | | | |
Title:
|
SYNCHRONIZED STORAGE PROVIDING MULTIPLE SYNCHRONIZATION SEMANTICS
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Patent #:
|
|
Issue Dt:
|
12/14/2010
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Application #:
|
11051978
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Filing Dt:
|
02/04/2005
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Publication #:
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Pub Dt:
|
08/10/2006
| | | | |
Title:
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INSTRUCTION/SKID BUFFERS IN A MULTITHREADING MICROPROCESSOR THAT STORE DISPATCHED INSTRUCTIONS TO AVOID RE-FETCHING FLUSHED INSTRUCTIONS
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Patent #:
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|
Issue Dt:
|
11/03/2009
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Application #:
|
11051997
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Filing Dt:
|
02/04/2005
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Publication #:
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Pub Dt:
|
08/10/2006
| | | | |
Title:
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INTERFACING EXTERNAL THREAD PRIORITIZING POLICY ENFORCING LOGIC WITH CUSTOMER MODIFIABLE REGISTER TO PROCESSOR INTERNAL SCHEDULER
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Patent #:
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Issue Dt:
|
07/07/2009
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Application #:
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11075041
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Filing Dt:
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03/08/2005
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Publication #:
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Pub Dt:
|
09/14/2006
| | | | |
Title:
|
THREE-TIERED TRANSLATION LOOKASIDE BUFFER HIERARCHY IN A MULTITHREADING MICROPROCESSOR
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Patent #:
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|
Issue Dt:
|
05/01/2012
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Application #:
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11284069
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Filing Dt:
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11/21/2005
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Publication #:
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Pub Dt:
|
05/11/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR CLEARING HAZARDS USING JUMP INSTRUCTIONS
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|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
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Application #:
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11567290
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Filing Dt:
|
12/06/2006
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Publication #:
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Pub Dt:
|
10/04/2007
| | | | |
Title:
|
INSTRUCTION ENCODING FOR SYSTEM REGISTER BIT SET AND CLEAR
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|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
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Application #:
|
11681610
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Filing Dt:
|
03/02/2007
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Publication #:
|
|
Pub Dt:
|
04/17/2008
| | | | |
Title:
|
HORIZONTALLY-SHARED CACHE VICTIMS IN MULTIPLE CORE PROCESSORS
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|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
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Application #:
|
12557421
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Filing Dt:
|
09/10/2009
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Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR GLOBAL ORDERING TO INSURE LATENCY INDEPENDENT COHERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
12576942
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Filing Dt:
|
10/09/2009
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Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
INSTRUCTION ENCODING FOR SYSTEM REGISTER BIT SET AND CLEAR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
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Application #:
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12684564
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Filing Dt:
|
01/08/2010
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Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
MULTITHREADING MICROPROCESSOR WITH OPTIMIZED THREAD SCHEDULER FOR INCREASING PIPELINE UTILIZATION EFFICIENCY
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|
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Patent #:
|
|
Issue Dt:
|
08/07/2012
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Application #:
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12891503
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Filing Dt:
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09/27/2010
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Publication #:
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Pub Dt:
|
03/29/2012
| | | | |
Title:
|
MICROPROCESSOR WITH DUAL-LEVEL ADDRESS TRANSLATION
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|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
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Application #:
|
12891530
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Filing Dt:
|
09/27/2010
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Publication #:
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|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
MICROPROCESSOR SYSTEM FOR VIRTUAL MACHINE EXECUTION
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
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Application #:
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13436654
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Filing Dt:
|
03/30/2012
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Publication #:
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|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
Apparatus and Method for Guest and Root Register Sharing in a Virtual Machine
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|
|
Patent #:
|
|
Issue Dt:
|
09/08/2015
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Application #:
|
13563025
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Filing Dt:
|
07/31/2012
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Publication #:
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|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
RESTORING A REGISTER RENAMING MAP
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|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
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Application #:
|
13683875
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Filing Dt:
|
11/21/2012
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Publication #:
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|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
Processor with Kernel Mode Access to User Space Virtual Addresses
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13774140
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Filing Dt:
|
02/22/2013
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Publication #:
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|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
Deferred Saving of Registers in a Shared Register Pool for a Multithreaded Microprocessor
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|
|
Patent #:
|
|
Issue Dt:
|
08/01/2017
|
Application #:
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13781319
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Filing Dt:
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02/28/2013
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Publication #:
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|
Pub Dt:
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08/28/2014
| | | | |
Title:
|
Way Lookahead
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|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
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Application #:
|
13789443
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Filing Dt:
|
03/07/2013
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Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
Apparatus and Method for Operating a Processor with an Operation Cache
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13828747
|
Filing Dt:
|
03/14/2013
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
Title:
|
Superforwarding Processor
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2016
|
Application #:
|
14816651
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Filing Dt:
|
08/03/2015
|
Publication #:
|
|
Pub Dt:
|
11/26/2015
| | | | |
Title:
|
Restoring a Register Renaming Map
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14919922
|
Filing Dt:
|
10/22/2015
|
Publication #:
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|
Pub Dt:
|
04/28/2016
| | | | |
Title:
|
Apparatus and Method of Throttling Hardware Pre-fetch
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|
|
Patent #:
|
|
Issue Dt:
|
01/22/2019
|
Application #:
|
15824613
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Filing Dt:
|
11/28/2017
|
Publication #:
|
|
Pub Dt:
|
03/29/2018
| | | | |
Title:
|
Translation Lookaside Buffer
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2020
|
Application #:
|
15833555
|
Filing Dt:
|
12/06/2017
|
Publication #:
|
|
Pub Dt:
|
04/05/2018
| | | | |
Title:
|
Migration of Data to Register File Cache
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2019
|
Application #:
|
15874724
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Filing Dt:
|
01/18/2018
|
Publication #:
|
|
Pub Dt:
|
05/24/2018
| | | | |
Title:
|
Decoding Instructions That Are Modified By One Or More Other Instructions
|
|