Total properties:
17
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
09564341
|
Filing Dt:
|
05/03/2000
|
Title:
|
HIGHLY CONCURRENT DMA CONTROLLER WITH PROGRAMMABLE DMA CHANNELS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
09584034
|
Filing Dt:
|
05/30/2000
|
Title:
|
SLACK FETCH TO IMPROVE PERFORMANCE IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
09837995
|
Filing Dt:
|
04/19/2001
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
Title:
|
SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR STORE INSTRUCTION COMPARATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2004
|
Application #:
|
09838069
|
Filing Dt:
|
04/19/2001
|
Publication #:
|
|
Pub Dt:
|
11/01/2001
| | | | |
Title:
|
INPUT REPLICATOR FOR INTERRUPTS IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
09839459
|
Filing Dt:
|
04/19/2001
|
Publication #:
|
|
Pub Dt:
|
11/01/2001
| | | | |
Title:
|
CYCLE COUNT REPLICATION IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09839621
|
Filing Dt:
|
04/19/2001
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
Title:
|
ACTIVE LOAD ADDRESS BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
09839626
|
Filing Dt:
|
04/19/2001
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
Title:
|
SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR UNCACHED LOAD ADDRESS COMPARATOR AND DATA VALUE REPLICATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2005
|
Application #:
|
09865605
|
Filing Dt:
|
05/29/2001
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
CHIP MULTIPROCESSOR WITH MULTIPLE OPERATING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
09965883
|
Filing Dt:
|
09/28/2001
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
Title:
|
ERROR INDICATION IN A RAID MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
10029699
|
Filing Dt:
|
12/18/2001
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
Title:
|
SOFTWARE CONTROLLED PRE-EXECUTION IN A MULTITHREADED PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2004
|
Application #:
|
10179081
|
Filing Dt:
|
06/25/2002
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
Title:
|
MEMORY AUTO-PRECHARGE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
10187337
|
Filing Dt:
|
06/28/2002
|
Publication #:
|
|
Pub Dt:
|
01/01/2004
| | | | |
Title:
|
SYSTEM FOR COMPRESSING/DECOMPRESSING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
10972588
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
04/27/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR SWITCHING THE ROLE OF BOOT PROCESSOR TO A SPARE PROCESSOR RESPONSIVE TO DETECTION OF LOSS OF LOCKSTEP IN A BOOT PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10972796
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR MAINTAINING IN A MULTI-PROCESSOR SYSTEM A SPARE PROCESSOR THAT IS IN LOCKSTEP FOR USE IN RECOVERING FROM LOSS OF LOCKSTEP FOR ANOTHER PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
10972888
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR SYSTEM FIRMWARE CAUSING AN OPERATING SYSTEM TO IDLE A PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
10973076
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROVIDING FIRMWARE RECOVERABLE LOCKSTEP PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
10973077
|
Filing Dt:
|
10/25/2004
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR ESTABLISHING A SPARE PROCESSOR FOR RECOVERING FROM LOSS OF LOCKSTEP IN A BOOT PROCESSOR
|
|