Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 018442/0746 | |
| Pages: | 3 |
| | Recorded: | 10/26/2006 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09285687
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Filing Dt:
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04/05/1999
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Publication #:
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Pub Dt:
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01/31/2002
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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10214214
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Filing Dt:
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08/06/2002
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Publication #:
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Pub Dt:
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07/10/2003
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Title:
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ELECTRIC DOUBLE LAYER CAPACITOR
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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10214254
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Filing Dt:
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08/06/2002
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Publication #:
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Pub Dt:
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12/19/2002
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Title:
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ELECTRIC DOUBLE LAYER CAPACITOR
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Assignee
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12-1, YURAKUCHO 1-CHOME, CHIYODA-KU |
TOKYO, JAPAN 100-8405 |
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Correspondence name and address
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HAMRE, SCHUMANN, MUELLER, ET AL.
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P.O. BOX 2902
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MINNEAPOLIS, MN 55402-0902
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