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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036873/0758   Pages: 13
Recorded: 10/15/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 220
Page 2 of 3
Pages: 1 2 3
1
Patent #:
7335591
Issue Dt:
02/26/2008
Application #:
10733217
Filing Dt:
12/11/2003
Publication #:
US20040166670
Pub Dt:
08/26/2004
Title:
METHOD FOR FORMING THREE-DIMENSIONAL STRUCTURES ON A SUBSTRATE
2
Patent #:
6900626
Issue Dt:
05/31/2005
Application #:
10736506
Filing Dt:
12/17/2003
Publication #:
US20040124824
Pub Dt:
07/01/2004
Title:
VOLTAGE GENERATOR ARRANGEMENT
3
Patent #:
6927557
Issue Dt:
08/09/2005
Application #:
10736507
Filing Dt:
12/17/2003
Publication #:
US20040130310
Pub Dt:
07/08/2004
Title:
VOLTAGE GENERATOR ARRANGEMENT
4
Patent #:
7054180
Issue Dt:
05/30/2006
Application #:
10737481
Filing Dt:
12/16/2003
Publication #:
US20050196909
Pub Dt:
09/08/2005
Title:
METHOD AND CIRCUIT FOR ADJUSTING A RESISTANCE IN AN INTEGRATED CIRCUIT
5
Patent #:
7315969
Issue Dt:
01/01/2008
Application #:
10737776
Filing Dt:
12/18/2003
Publication #:
US20040145935
Pub Dt:
07/29/2004
Title:
MEMORY MODULE WITH A TEST DEVICE
6
Patent #:
7251758
Issue Dt:
07/31/2007
Application #:
10738118
Filing Dt:
12/18/2003
Publication #:
US20040196022
Pub Dt:
10/07/2004
Title:
SEMICONDUCTOR DEVICE TESTING APPARATUS, SYSTEM, AND METHOD FOR TESTING THE CONTACTING WITH SEMICONDUCTOR DEVICES POSITIONED ONE UPON THE OTHER
7
Patent #:
7094674
Issue Dt:
08/22/2006
Application #:
10739477
Filing Dt:
12/18/2003
Publication #:
US20040142548
Pub Dt:
07/22/2004
Title:
METHOD FOR PRODUCTION OF CONTACTS ON A WAFER
8
Patent #:
6944573
Issue Dt:
09/13/2005
Application #:
10740377
Filing Dt:
12/18/2003
Publication #:
US20040220754
Pub Dt:
11/04/2004
Title:
METHOD AND APPARATUS FOR THE ANALYSIS OF SCRATCHES ON SEMICONDUCTOR WAFERS
9
Patent #:
6992348
Issue Dt:
01/31/2006
Application #:
10741970
Filing Dt:
12/19/2003
Publication #:
US20040164345
Pub Dt:
08/26/2004
Title:
SEMICONDUCTOR MEMORY WITH VERTICAL CHARGE-TRAPPING MEMORY CELLS AND FABRICATION
10
Patent #:
6965535
Issue Dt:
11/15/2005
Application #:
10742761
Filing Dt:
12/23/2003
Publication #:
US20040184333
Pub Dt:
09/23/2004
Title:
INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT AND A METHOD FOR OPERATING THE SAME
11
Patent #:
7297468
Issue Dt:
11/20/2007
Application #:
10743105
Filing Dt:
12/23/2003
Publication #:
US20040137375
Pub Dt:
07/15/2004
Title:
METHOD FOR FORMING A STRUCTURE ELEMENT ON A WAFER BY MEANS OF A MASK AND A TRIMMING MASK ASSIGNED HERETO
12
Patent #:
7335936
Issue Dt:
02/26/2008
Application #:
10744051
Filing Dt:
12/23/2003
Publication #:
US20040197989
Pub Dt:
10/07/2004
Title:
DRAM MEMORY HAVING VERTICALLY ARRANGED SELECTION TRANSISTORS
13
Patent #:
7289231
Issue Dt:
10/30/2007
Application #:
10744067
Filing Dt:
12/24/2003
Publication #:
US20040194039
Pub Dt:
09/30/2004
Title:
APPARATUS AND METHOD FOR DETERMINING PHYSICAL PROPERTIES OF A MASK BLANK
14
Patent #:
7022549
Issue Dt:
04/04/2006
Application #:
10747670
Filing Dt:
12/30/2003
Publication #:
US20040191958
Pub Dt:
09/30/2004
Title:
METHOD FOR CONNECTING AN INTEGRATED CIRCUIT TO A SUBSTRATE AND CORRESPONDING ARRANGEMENT
15
Patent #:
7002222
Issue Dt:
02/21/2006
Application #:
10753407
Filing Dt:
01/09/2004
Publication #:
US20050029602
Pub Dt:
02/10/2005
Title:
INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT AND METHOD OF MANUFACTURING THE SAME
16
Patent #:
7150946
Issue Dt:
12/19/2006
Application #:
10753604
Filing Dt:
01/08/2004
Publication #:
US20050153213
Pub Dt:
07/14/2005
Title:
METHOD FOR THE REPAIR OF DEFECTS IN PHOTOLITHOGRAPHIC MASKS FOR PATTERNING SEMICONDUCTOR WAFERS
17
Patent #:
7231562
Issue Dt:
06/12/2007
Application #:
10754455
Filing Dt:
01/09/2004
Publication #:
US20040260987
Pub Dt:
12/23/2004
Title:
MEMORY MODULE, TEST SYSTEM AND METHOD FOR TESTING ONE OR A PLURALITY OF MEMORY MODULES
18
Patent #:
7049228
Issue Dt:
05/23/2006
Application #:
10756360
Filing Dt:
01/14/2004
Publication #:
US20040192031
Pub Dt:
09/30/2004
Title:
METHOD FOR INTRODUCING STRUCTURES WHICH HAVE DIFFERENT DIMENSIONS INTO A SUBSTRATE
19
Patent #:
7060534
Issue Dt:
06/13/2006
Application #:
10757549
Filing Dt:
01/15/2004
Publication #:
US20040197978
Pub Dt:
10/07/2004
Title:
HOUSING FOR SEMICONDUCTOR DEVICES, SEMICONDUCTOR DEVICE PIN, AND METHOD FOR THE MANUFACTURING OF PINS
20
Patent #:
6970389
Issue Dt:
11/29/2005
Application #:
10757594
Filing Dt:
01/15/2004
Publication #:
US20040156254
Pub Dt:
08/12/2004
Title:
INTEGRATED MEMORY
21
Patent #:
7136320
Issue Dt:
11/14/2006
Application #:
10761127
Filing Dt:
01/20/2004
Publication #:
US20040208074
Pub Dt:
10/21/2004
Title:
METHOD AND REGULATING CIRCUIT FOR REFRESHING DYNAMIC MEMORY CELLS
22
Patent #:
7110310
Issue Dt:
09/19/2006
Application #:
10762280
Filing Dt:
01/23/2004
Publication #:
US20040233747
Pub Dt:
11/25/2004
Title:
RAM STORE AND CONTROL METHOD THEREFOR
23
Patent #:
7087485
Issue Dt:
08/08/2006
Application #:
10765052
Filing Dt:
01/28/2004
Publication #:
US20050037565
Pub Dt:
02/17/2005
Title:
METHOD OF FABRICATING AN OXIDE COLLAR FOR A TRENCH CAPACITOR
24
Patent #:
7074660
Issue Dt:
07/11/2006
Application #:
10765910
Filing Dt:
01/29/2004
Publication #:
US20050014318
Pub Dt:
01/20/2005
Title:
FINFET DEVICE AND METHOD OF FABRICATION
25
Patent #:
7214610
Issue Dt:
05/08/2007
Application #:
10768241
Filing Dt:
01/30/2004
Publication #:
US20040242007
Pub Dt:
12/02/2004
Title:
PROCESS FOR PRODUCING ALUMINUM-FILLED CONTACT HOLES
26
Patent #:
7121473
Issue Dt:
10/17/2006
Application #:
10769286
Filing Dt:
01/30/2004
Publication #:
US20040211843
Pub Dt:
10/28/2004
Title:
SECURITY MEMORY CARD AND PRODUCTION METHOD
27
Patent #:
7157194
Issue Dt:
01/02/2007
Application #:
10771302
Filing Dt:
02/05/2004
Publication #:
US20060024594
Pub Dt:
02/02/2006
Title:
METHOD FOR EXPOSING A SUBSTRATE WITH A STRUCTURE PATTERN WHICH COMPENSATES FOR THE OPTICAL PROXIMITY EFFECT
28
Patent #:
7120077
Issue Dt:
10/10/2006
Application #:
10776178
Filing Dt:
02/12/2004
Publication #:
US20040184337
Pub Dt:
09/23/2004
Title:
MEMORY MODULE HAVING A PLURALITY OF INTEGRATED MEMORY COMPONENTS
29
Patent #:
6982893
Issue Dt:
01/03/2006
Application #:
10776467
Filing Dt:
02/12/2004
Publication #:
US20040264151
Pub Dt:
12/30/2004
Title:
MEMORY MODULE HAVING A PLURALITY OF INTEGRATED MEMORY COMPONENTS
30
Patent #:
7109544
Issue Dt:
09/19/2006
Application #:
10777128
Filing Dt:
02/13/2004
Publication #:
US20050001257
Pub Dt:
01/06/2005
Title:
ARCHITECTURE FOR VERTICAL TRANSISTOR CELLS AND TRANSISTOR-CONTROLLED MEMORY CELLS
31
Patent #:
7149864
Issue Dt:
12/12/2006
Application #:
10777992
Filing Dt:
02/12/2004
Publication #:
US20040225856
Pub Dt:
11/11/2004
Title:
METHOD AND CIRCUIT FOR ALLOCATING MEMORY ARRANGEMENT ADDRESSES
32
Patent #:
7034559
Issue Dt:
04/25/2006
Application #:
10780104
Filing Dt:
02/17/2004
Publication #:
US20040222810
Pub Dt:
11/11/2004
Title:
INTEGRATED TEST CIRCUIT IN AN INTEGRATED CIRCUIT
33
Patent #:
6924680
Issue Dt:
08/02/2005
Application #:
10780284
Filing Dt:
02/17/2004
Publication #:
US20040222830
Pub Dt:
11/11/2004
Title:
DLL CIRCUIT FOR STABILIZATION OF THE INITIAL TRANSIENT PHASE
34
Patent #:
7145377
Issue Dt:
12/05/2006
Application #:
10783068
Filing Dt:
02/20/2004
Publication #:
US20040189349
Pub Dt:
09/30/2004
Title:
DEVICE AND METHOD FOR CONVERTING AN INPUT SIGNAL
35
Patent #:
6975131
Issue Dt:
12/13/2005
Application #:
10783377
Filing Dt:
02/20/2004
Publication #:
US20040222811
Pub Dt:
11/11/2004
Title:
INTEGRATED MODULE HAVING A DELAY ELEMENT
36
Patent #:
7437627
Issue Dt:
10/14/2008
Application #:
10784134
Filing Dt:
02/20/2004
Publication #:
US20040223387
Pub Dt:
11/11/2004
Title:
METHOD AND TEST DEVICE FOR DETERMINING A REPAIR SOLUTION FOR A MEMORY MODULE
37
Patent #:
6967370
Issue Dt:
11/22/2005
Application #:
10785087
Filing Dt:
02/25/2004
Publication #:
US20040201051
Pub Dt:
10/14/2004
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT HAVING A MULTIPLICITY OF MEMORY CELLS
38
Patent #:
6917100
Issue Dt:
07/12/2005
Application #:
10785140
Filing Dt:
02/24/2004
Publication #:
US20040222507
Pub Dt:
11/11/2004
Title:
CIRCUIT MODULE HAVING INTERLEAVED GROUPS OF CIRCUIT CHIPS
39
Patent #:
6998664
Issue Dt:
02/14/2006
Application #:
10787119
Filing Dt:
02/27/2004
Publication #:
US20040196711
Pub Dt:
10/07/2004
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT HAVING A CELL ARRAY HAVING A MULTIPLICITY OF MEMORY CELLS
40
Patent #:
7138677
Issue Dt:
11/21/2006
Application #:
10787934
Filing Dt:
02/27/2004
Publication #:
US20040228067
Pub Dt:
11/18/2004
Title:
CAPACITOR ARRANGEMENT WITH CAPACITORS ARRANGED ONE IN THE OTHER
41
Patent #:
7229723
Issue Dt:
06/12/2007
Application #:
10789994
Filing Dt:
03/02/2004
Publication #:
US20040197676
Pub Dt:
10/07/2004
Title:
METHOD FOR FORMING AN OPENING IN A LIGHT-ABSORBING LAYER ON A MASK
42
Patent #:
7393613
Issue Dt:
07/01/2008
Application #:
10791763
Filing Dt:
03/04/2004
Publication #:
US20040202943
Pub Dt:
10/14/2004
Title:
SET OF AT LEAST TWO MASKS FOR THE PROJECTION OF STRUCTURE PATTERNS
43
Patent #:
6992498
Issue Dt:
01/31/2006
Application #:
10791768
Filing Dt:
03/04/2004
Publication #:
US20040201395
Pub Dt:
10/14/2004
Title:
TEST APPARATUS FOR TESTING INTEGRATED MODULES AND METHOD FOR OPERATING A TEST APPARATUS
44
Patent #:
7447805
Issue Dt:
11/04/2008
Application #:
10792408
Filing Dt:
03/03/2004
Publication #:
US20040228166
Pub Dt:
11/18/2004
Title:
BUFFER CHIP AND METHOD FOR CONTROLLING ONE OR MORE MEMORY ARRANGEMENTS
45
Patent #:
7393614
Issue Dt:
07/01/2008
Application #:
10792693
Filing Dt:
03/05/2004
Publication #:
US20040197677
Pub Dt:
10/07/2004
Title:
SET OF MASKS INCLUDING A FIRST MASK AND A SECOND TRIMMING MASK WITH A SEMITRANSPARENT REGION HAVING A TRANSPARENCY BETWEEN 20% AND 80% TO CONTROL DIFFRACTION EFFECTS AND OBTAIN MAXIMUM DEPTH OF FOCUS FOR THE PROJECTION OF STRUCTURE PATTERNS ONTO A SEMICONDUCTOR WAF
46
Patent #:
6862234
Issue Dt:
03/01/2005
Application #:
10798245
Filing Dt:
03/11/2004
Publication #:
US20040257893
Pub Dt:
12/23/2004
Title:
METHOD AND TEST CIRCUIT FOR TESTING A DYNAMIC MEMORY CIRCUIT
47
Patent #:
7181579
Issue Dt:
02/20/2007
Application #:
10798334
Filing Dt:
03/12/2004
Publication #:
US20040205308
Pub Dt:
10/14/2004
Title:
INTEGRATED MEMORY HAVING REDUNDANT UNITS OF MEMORY CELLS AND METHOD FOR TESTING AN INTEGRATED MEMORY
48
Patent #:
7052970
Issue Dt:
05/30/2006
Application #:
10798863
Filing Dt:
03/12/2004
Publication #:
US20040241929
Pub Dt:
12/02/2004
Title:
INSULATOR STRUCTURE AND METHOD FOR PRODUCING INSULATOR STRUCTURES IN A SEMICONDUCTOR SUBSTRATE
49
Patent #:
7037777
Issue Dt:
05/02/2006
Application #:
10801781
Filing Dt:
03/16/2004
Publication #:
US20040203238
Pub Dt:
10/14/2004
Title:
PROCESS FOR PRODUCING AN ETCHING MASK ON A MICROSTRUCTURE, IN PARTICULAR A SEMICONDUCTOR STRUCTURE WITH TRENCH CAPACITORS, AND CORRESPONDING USE OF THE ETCHING MASK
50
Patent #:
7401549
Issue Dt:
07/22/2008
Application #:
10802618
Filing Dt:
03/17/2004
Publication #:
US20040219803
Pub Dt:
11/04/2004
Title:
ARRANGEMENT FOR TRANSFERRING INFORMATION/STRUCTURES TO WAFERS
51
Patent #:
7135723
Issue Dt:
11/14/2006
Application #:
10810489
Filing Dt:
03/26/2004
Publication #:
US20040217349
Pub Dt:
11/04/2004
Title:
INTEGRATED CIRCUIT WITH A TEST CIRCUIT
52
Patent #:
7018781
Issue Dt:
03/28/2006
Application #:
10811509
Filing Dt:
03/29/2004
Publication #:
US20050003308
Pub Dt:
01/06/2005
Title:
METHOD FOR FABRICATING A CONTACT HOLE PLANE IN A MEMORY MODULE
53
Patent #:
7405991
Issue Dt:
07/29/2008
Application #:
10812395
Filing Dt:
03/30/2004
Publication #:
US20050017341
Pub Dt:
01/27/2005
Title:
SEMICONDUCTOR DEVICE VOLTAGE SUPPLY FOR A SYSTEM WITH AT LEAST TWO, ESPECIALLY STACKED, SEMICONDUCTOR DEVICES
54
Patent #:
7087492
Issue Dt:
08/08/2006
Application #:
10812876
Filing Dt:
03/31/2004
Publication #:
US20050026373
Pub Dt:
02/03/2005
Title:
METHOD FOR FABRICATING TRANSISTORS OF DIFFERENT CONDUCTION TYPES AND HAVING DIFFERENT PACKING DENSITIES IN A SEMICONDUCTOR SUBSTRATE
55
Patent #:
7009420
Issue Dt:
03/07/2006
Application #:
10815541
Filing Dt:
04/01/2004
Publication #:
US20040232941
Pub Dt:
11/25/2004
Title:
INPUT CIRCUIT FOR RECEIVING A SIGNAL AT AN INPUT ON AN INTEGRATED CIRCUIT
56
Patent #:
7068546
Issue Dt:
06/27/2006
Application #:
10815856
Filing Dt:
04/02/2004
Publication #:
US20040223376
Pub Dt:
11/11/2004
Title:
INTEGRATED MEMORY HAVING A VOLTAGE GENERATOR CIRCUIT FOR GENERATING A VOLTAGE SUPPLY FOR A READ/WRITE AMPLIFIER
57
Patent #:
7268877
Issue Dt:
09/11/2007
Application #:
10816184
Filing Dt:
04/02/2004
Publication #:
US20040257572
Pub Dt:
12/23/2004
Title:
METHOD AND APPARATUS FOR ORIENTING SEMICONDUCTOR WAFERS IN SEMICONDUCTOR FABRICATION
58
Patent #:
7064996
Issue Dt:
06/20/2006
Application #:
10817469
Filing Dt:
04/02/2004
Publication #:
US20040246802
Pub Dt:
12/09/2004
Title:
REFRESHING DYNAMIC MEMORY CELLS IN A MEMORY CIRCUIT AND A MEMORY CIRCUIT
59
Patent #:
7360036
Issue Dt:
04/15/2008
Application #:
10817504
Filing Dt:
04/02/2004
Publication #:
US20040233759
Pub Dt:
11/25/2004
Title:
DATA MEMORY CIRCUIT
60
Patent #:
6956404
Issue Dt:
10/18/2005
Application #:
10819222
Filing Dt:
04/07/2004
Publication #:
US20040222820
Pub Dt:
11/11/2004
Title:
DRIVER CIRCUIT HAVING A PLURALITY OF DRIVERS FOR DRIVING SIGNALS IN PARALLEL
61
Patent #:
7392443
Issue Dt:
06/24/2008
Application #:
10822529
Filing Dt:
04/12/2004
Publication #:
US20050005218
Pub Dt:
01/06/2005
Title:
METHOD AND APPARATUS FOR TESTING DRAM MEMORY CHIPS IN MULTICHIP MEMORY MODULES
62
Patent #:
7092300
Issue Dt:
08/15/2006
Application #:
10822997
Filing Dt:
04/13/2004
Publication #:
US20050135139
Pub Dt:
06/23/2005
Title:
MEMORY APPARATUS HAVING A SHORT WORD LINE CYCLE TIME AND METHOD FOR OPERATING A MEMORY APPARATUS
63
Patent #:
6940775
Issue Dt:
09/06/2005
Application #:
10823608
Filing Dt:
04/14/2004
Publication #:
US20040218458
Pub Dt:
11/04/2004
Title:
INTEGRATED DYNAMIC MEMORY HAVING A CONTROL CIRCUIT FOR CONTROLLING A REFRESH MODE FOR MEMORY CELLS
64
Patent #:
7332430
Issue Dt:
02/19/2008
Application #:
10826601
Filing Dt:
04/16/2004
Publication #:
US20040259290
Pub Dt:
12/23/2004
Title:
METHOD FOR IMPROVING THE MECHANICAL PROPERTIES OF BOC MODULE ARRANGEMENTS
65
Patent #:
7061089
Issue Dt:
06/13/2006
Application #:
10828034
Filing Dt:
04/20/2004
Publication #:
US20040212070
Pub Dt:
10/28/2004
Title:
MEMORY MODULE HAVING SPACE-SAVING ARRANGEMENT OF MEMORY CHIPS AND MEMORY CHIP THEREFORE
66
Patent #:
7023701
Issue Dt:
04/04/2006
Application #:
10829362
Filing Dt:
04/22/2004
Publication #:
US20050018401
Pub Dt:
01/27/2005
Title:
DEVICE FOR COOLING MEMORY MODULES
67
Patent #:
7009263
Issue Dt:
03/07/2006
Application #:
10830675
Filing Dt:
04/23/2004
Publication #:
US20040245576
Pub Dt:
12/09/2004
Title:
FIELD-EFFECT TRANSISTOR
68
Patent #:
7477717
Issue Dt:
01/13/2009
Application #:
10831001
Filing Dt:
04/23/2004
Publication #:
US20040260964
Pub Dt:
12/23/2004
Title:
INPUT RECEIVER CIRCUIT
69
Patent #:
6985390
Issue Dt:
01/10/2006
Application #:
10831466
Filing Dt:
04/23/2004
Publication #:
US20040246792
Pub Dt:
12/09/2004
Title:
INTEGRATED MEMORY CIRCUIT HAVING A REDUNDANCY CIRCUIT AND A METHOD FOR REPLACING A MEMORY AREA
70
Patent #:
7030645
Issue Dt:
04/18/2006
Application #:
10831623
Filing Dt:
04/23/2004
Publication #:
US20050001650
Pub Dt:
01/06/2005
Title:
METHOD FOR SETTING A TERMINATION VOLTAGE AND AN INPUT CIRCUIT
71
Patent #:
7123069
Issue Dt:
10/17/2006
Application #:
10834378
Filing Dt:
04/29/2004
Publication #:
US20040263229
Pub Dt:
12/30/2004
Title:
LATCH OR PHASE DETECTOR DEVICE
72
Patent #:
6996026
Issue Dt:
02/07/2006
Application #:
10834383
Filing Dt:
04/29/2004
Publication #:
US20040251939
Pub Dt:
12/16/2004
Title:
DEVICES FOR SYNCHRONIZING CLOCK SIGNALS
73
Patent #:
6943604
Issue Dt:
09/13/2005
Application #:
10834385
Filing Dt:
04/29/2004
Publication #:
US20040257134
Pub Dt:
12/23/2004
Title:
DEVICE AND METHOD FOR CORRECTING THE DUTY CYCLE OF A CLOCK SIGNAL
74
Patent #:
7307735
Issue Dt:
12/11/2007
Application #:
10835259
Filing Dt:
04/30/2004
Publication #:
US20050003642
Pub Dt:
01/06/2005
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Assignor
1
INFINEON TECHNOLOGIES AG
Exec Dt:
07/08/2015
Assignee
1
POLARIS INNOVATIONS LIMITED
29 EARLSFORT TERRACE, DUBLIN 2
DUBLIN, IRELAND
Correspondence name and address
POLARIS INNOVATIONS LIMITED
303 TERRY FOX DRIVE, SUITE 300
OTTAWA, K2K 3J1 CANADA

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