USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	011554/0760			Pages:	10
		Recorded:	02/26/2001
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14

Patent #:	5508700	Issue Dt:	04/16/1996	Application #:	08214265	Filing Dt:	03/17/1994
Title:	CAPACITANCE SENSITIVE SWITCH AND SWITCH ARRAY

Patent #:	5831597	Issue Dt:	11/03/1998	Application #:	08653589	Filing Dt:	05/24/1996
Title:	COMPUTER INPUT DEVICE FOR USE IN CONJUNCTON WITH A MOUSE INPUT DEVICE

Patent #:	5812472	Issue Dt:	09/22/1998	Application #:	08895305	Filing Dt:	07/16/1997
Title:	NESTED LOOP METHOD OF IDENTIFYING SYNCHRONOUS MEMORIES

Patent #:	5995424	Issue Dt:	11/30/1999	Application #:	08895307	Filing Dt:	07/16/1997
Title:	SYNCHRONOUS MEMORY TEST SYSTEM

Patent #:	6182253	Issue Dt:	01/30/2001	Application #:	08895550	Filing Dt:	07/16/1997
Title:	METHOD AND SYSTEM FOR AUTOMATIC SYNCHRONOUS MEMORY IDENTIFICATION

Patent #:	5933102	Issue Dt:	08/03/1999	Application #:	08935468	Filing Dt:	09/24/1997
Title:	CAPACITIVE SENSITIVE SWITCH METHOD AND SYSTEM

Patent #:	5956280	Issue Dt:	09/21/1999	Application #:	09032958	Filing Dt:	03/02/1998
Title:	CONTACT TEST METHOD AND SYSTEM FOR MEMORY TESTERS

Patent #:	6067648	Issue Dt:	05/23/2000	Application #:	09032968	Filing Dt:	03/02/1998
Title:	PROGRAMMABLE PULSE GENERATOR

Patent #:	6008664	Issue Dt:	12/28/1999	Application #:	09033285	Filing Dt:	03/02/1998
Title:	PARAMETRIC TEST SYSTEM AND METHOD

Patent #:	6064948	Issue Dt:	05/16/2000	Application #:	09033364	Filing Dt:	03/02/1998
Title:	TESTER SYSTEMS

Patent #:	5912852	Issue Dt:	06/15/1999	Application #:	09115001	Filing Dt:	07/14/1998
Title:	SYNCHRONOUS MEMORY TEST METHOD

Patent #:	5914902	Issue Dt:	06/22/1999	Application #:	09115386	Filing Dt:	07/14/1998
Title:	SYNCHRONOUS MEMORY TESTER

Patent #:	5999468	Issue Dt:	12/07/1999	Application #:	09193804	Filing Dt:	11/17/1998
Title:	METHOD AND SYSTEM FOR IDENIFYING A MEMORY MODULE CONFIGURATION

Patent #:	6285962	Issue Dt:	09/04/2001	Application #:	09267731	Filing Dt:	03/15/1999
Title:	METHOD AND SYSTEM FOR TESTING RAMBUS MEMORY MODULES

Assignor

Exec Dt:

09/19/2000

Assignee

LOAN DOCUMENTATION HG150

3003 TASMAN DRIVE

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	SILICON VALLEY BANK
	JOSEPHINE M. CARINO
	LOAN DOCUMENTATION HG150
	3003 TASMAN DRIVE
	SANTA CLARA, CA 95054

Search Results as of: 06/24/2024 12:25 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6