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Patent #:
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Issue Dt:
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05/04/2010
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Application #:
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11479618
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Filing Dt:
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06/30/2006
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Title:
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CROSS POINT SWITCH
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Patent #:
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Issue Dt:
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06/29/2010
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Application #:
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11479630
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Filing Dt:
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06/30/2006
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Title:
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DUAL PORTED REPLICATED DATA CACHE
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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11479703
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Filing Dt:
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06/29/2006
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Title:
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Modifications to increase computer system security
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11480107
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Filing Dt:
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06/30/2006
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Title:
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TRIPLE LATCH FLIP FLOP SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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02/26/2008
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Application #:
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11490356
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Filing Dt:
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07/19/2006
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Title:
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CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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11500575
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Filing Dt:
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08/07/2006
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Title:
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METHOD AND SYSTEM FOR PROVIDING HARDWARE SUPPORT FOR MEMORY PROTECTION AND VIRTUAL MEMORY ADDRESS TRANSLATION FOR A VIRTUAL MACHINE
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Patent #:
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Issue Dt:
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07/22/2008
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11507779
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Filing Dt:
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08/21/2006
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Title:
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SWITCHING TO ORIGINAL CODE COMPARISON OF MODIFIABLE CODE FOR TRANSLATED CODE VALIDITY WHEN FREQUENCY OF DETECTING MEMORY OVERWRITES EXCEEDS THRESHOLD
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Patent #:
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Issue Dt:
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02/26/2008
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Application #:
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11512900
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Filing Dt:
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08/29/2006
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Title:
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FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/05/2010
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Application #:
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11524044
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Filing Dt:
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09/19/2006
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Title:
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A METHOD AND SYSTEM FOR STORING AND RETRIEVING A TRANSLATION OF TARGET PROGRAM INSTRUCTION FROM A HOST PROCESSOR USING FAST LOOK-UP OF INDIRECT BRANCH DESTINATION IN A DYNAMIC TRANSLATION SYSTEM
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Patent #:
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12/01/2009
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11528031
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Filing Dt:
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09/26/2006
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Title:
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FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/29/2011
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11529865
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Filing Dt:
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09/29/2006
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Title:
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DYNAMIC CHIP CONTROL
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Patent #:
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Issue Dt:
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03/23/2010
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11529972
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Filing Dt:
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09/29/2006
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Title:
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RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL
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Patent #:
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07/27/2010
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11540117
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09/29/2006
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Title:
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Patent #:
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04/13/2010
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11540387
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09/29/2006
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Title:
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SIGNAL GENERATOR WITH OUTPUT FREQUENCY GREATER THAN THE OSCILLATOR FREQUENCY
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Patent #:
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08/10/2010
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11540766
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Filing Dt:
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09/29/2006
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Title:
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11540789
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Filing Dt:
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09/29/2006
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Title:
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Patent #:
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Issue Dt:
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05/25/2010
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11583463
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Filing Dt:
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10/18/2006
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Title:
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BRAIDED SET ASSOCIATIVE CACHING TECHNIQUES
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Patent #:
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04/22/2008
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11591431
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Filing Dt:
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10/31/2006
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Title:
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SERVO LOOP FOR WELL BIAS VOLTAGE SOURCE
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Patent #:
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02/08/2011
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11594672
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11/07/2006
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Title:
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PIPELINE REPLAY SUPPORT FOR UNALIGNED MEMORY OPERATIONS
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10/20/2009
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11638236
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12/12/2006
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METHOD AND SYSTEM FOR CONSERVATIVELY MANAGING STORE CAPACITY AVAILABLE TO A PROCESSOR ISSUING STORES
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Patent #:
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09/21/2010
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11639603
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12/15/2006
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06/19/2008
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Title:
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SYSTEMS AND METHODS FOR DETERMINING DEVICE TEMPERATURE
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Patent #:
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12/22/2009
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11642187
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Filing Dt:
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12/19/2006
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Title:
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SYSTEM AND METHOD FOR CHARACTERIZING A POTENTIAL DISTRIBUTION
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Patent #:
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10/27/2009
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Application #:
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11644224
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Filing Dt:
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12/22/2006
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Title:
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SYSTEM MANAGEMENT MODE CODE MODIFICATIONS TO INCREASE COMPUTER SYSTEM SECURITY
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Patent #:
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Issue Dt:
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06/29/2010
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11649443
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Filing Dt:
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01/03/2007
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Title:
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METHOD AND APPARATUS FOR OPTIMIZING BODY BIAS CONNECTIONS IN CMOS CIRCUITS USING A DEEP N-WELL GRID STRUCTURE
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Patent #:
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Issue Dt:
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09/29/2009
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Application #:
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11703323
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Filing Dt:
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02/06/2007
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Title:
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REPEATER CIRCUIT HAVING DIFFERENT OPERATING AND RESET VOLTAGE RANGES, AND METHODS THEREOF
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11786336
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Filing Dt:
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04/10/2007
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Title:
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HISTORY BASED PIPELINED BRANCH PREDICTION
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Patent #:
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Issue Dt:
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10/06/2009
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11787908
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04/17/2007
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Title:
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SYSTEMS AND METHODS FOR ADJUSTING THRESHOLD VOLTAGE
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Patent #:
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01/29/2008
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11799496
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05/01/2007
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Title:
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DIAGONAL DEEP WELL REGION FOR ROUTING BODY-BIAS VOLTAGE FOR MOSFETS IN SURFACE WELL REGIONS
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01/18/2011
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05/29/2007
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05/14/2013
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11810516
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06/05/2007
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09/29/2009
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07/10/2007
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01/31/2008
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Title:
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SYSTEM AND METHOD FOR REDUCING HEAT DISSIPATION DURING BURN-IN
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08/24/2010
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07/19/2007
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07/21/2009
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07/24/2007
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11/22/2007
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06/15/2010
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08/14/2007
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01/11/2011
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08/21/2007
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12/20/2007
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TRANSITIONING TO AND FROM A SLEEP STATE OF A PROCESSOR
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02/15/2011
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11/20/2007
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09/14/2010
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12/04/2007
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09/22/2009
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12/04/2007
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04/17/2008
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09/13/2011
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12/18/2007
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09/22/2009
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12/18/2007
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01/17/2012
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12/20/2007
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11/25/2008
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05/08/2008
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10/27/2009
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05/29/2008
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04/10/2012
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02/12/2008
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06/11/2013
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02/12/2008
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05/25/2010
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02/19/2008
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06/19/2008
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05/25/2010
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02/19/2008
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08/09/2011
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02/19/2008
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06/12/2008
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04/09/2013
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02/19/2008
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06/12/2008
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12/15/2009
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02/19/2008
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06/19/2008
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03/02/2010
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02/26/2008
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06/19/2008
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CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS
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02/11/2014
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02/26/2008
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11/23/2010
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02/26/2008
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05/04/2010
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02/26/2008
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06/19/2008
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02/14/2012
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03/04/2008
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02/02/2016
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02/11/2008
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06/12/2008
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12/07/2010
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04/22/2008
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11/25/2014
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08/03/2010
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05/20/2008
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09/11/2008
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07/12/2011
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05/27/2008
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03/22/2011
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05/27/2008
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11/27/2008
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03/20/2012
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06/10/2008
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01/21/2014
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06/16/2008
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10/09/2008
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03/16/2010
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06/30/2008
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03/08/2011
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07/22/2008
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Publication #:
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Pub Dt:
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12/18/2008
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Title:
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CHECKING FOR INSTRUCTION INVARIANCE TO EXECUTE PREVIOUSLY OBTAINED TRANSLATION CODE BY COMPARING INSTRUCTION TO A COPY STORED WHEN WRITE OPERATION TO THE MEMORY PORTION OCCUR
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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12181221
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Filing Dt:
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07/28/2008
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Publication #:
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Pub Dt:
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02/19/2009
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Title:
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ADVANCED REPEATER WITH DUTY CYCLE ADJUSTMENT
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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12194504
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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12/11/2008
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Title:
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DYNAMIC RING OSCILLATORS
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12259262
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Filing Dt:
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10/27/2008
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Title:
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METHOD AND SYSTEM FOR USING EXTERNAL STORAGE TO AMORTIZE CPU CYCLE UTILIZATION
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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12268304
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Filing Dt:
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11/10/2008
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Title:
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EXPLICIT CONTROL OF SPECULATION
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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12277227
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Filing Dt:
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11/24/2008
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Publication #:
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Pub Dt:
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03/26/2009
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Title:
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SYSTEM AND METHOD FOR MEASURING NEGATIVE BIAS THERMAL INSTABILITY WITH A RING OSCILLATOR
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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12330324
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Filing Dt:
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12/08/2008
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Title:
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CONTROLLING TEMPERATURE IN A SEMICONDUCTOR DEVICE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12346633
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Filing Dt:
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12/30/2008
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Publication #:
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Pub Dt:
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05/28/2015
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Title:
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APPARATUS FOR CONTROLLING SEMICONDUCTOR CHIP CHARACTERISTICS
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Patent #:
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Issue Dt:
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05/03/2011
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Application #:
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12353064
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Filing Dt:
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01/13/2009
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Title:
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PROCESSING BYPASS DIRECTORY TRANCKING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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12391993
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Filing Dt:
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02/24/2009
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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TRIPLE LATCH FLIP FLOP SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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06/21/2011
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Application #:
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12391998
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Filing Dt:
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02/24/2009
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Title:
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SECURE MEMORY ACCESS SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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06/19/2012
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Application #:
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12392022
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Filing Dt:
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02/24/2009
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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METHOD AND SYSTEM FOR AUTOMATED SCHEMATIC DIAGRAM CONVERSION TO SUPPORT SEMICONDUCTOR BODY BIAS DESIGNS
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Patent #:
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Issue Dt:
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01/24/2012
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Application #:
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12397085
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Filing Dt:
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03/03/2009
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Publication #:
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Pub Dt:
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09/03/2009
| | | | |
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Title:
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POWER EFFICIENT MULTIPLEXER
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Patent #:
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Issue Dt:
|
02/28/2012
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Application #:
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12410249
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Filing Dt:
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03/24/2009
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Publication #:
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Pub Dt:
|
03/25/2010
| | | | |
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Title:
|
SYSTEMS AND METHODS FOR CONTROL OF INTEGRATED CIRCUITS COMPRISING BODY BIASING SYSTEMS
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