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Reel/Frame:054257/0771   Pages: 6
Recorded: 11/03/2020
Attorney Dkt #:TSMP20193052US00
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
08/15/2023
Application #:
16881211
Filing Dt:
05/22/2020
Publication #:
Pub Dt:
11/25/2021
Title:
Giga Interposer Integration through Chip-On-Wafer-On-Substrate
Assignors
1
Exec Dt:
09/21/2020
2
Exec Dt:
09/29/2020
3
Exec Dt:
09/29/2020
4
Exec Dt:
08/21/2020
5
Exec Dt:
10/05/2020
6
Exec Dt:
08/21/2020
7
Exec Dt:
10/07/2020
8
Exec Dt:
10/07/2020
9
Exec Dt:
10/13/2020
10
Exec Dt:
10/30/2020
11
Exec Dt:
09/29/2020
Assignee
1
8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300-78
Correspondence name and address
SLATER MATSIL, LLP
17950 PRESTON RD., SUITE 1000
DALLAS, TX 75252

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