Patent Assignment Details
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Reel/Frame: | 032925/0787 | |
| Pages: | 4 |
| | Recorded: | 05/19/2014 | | |
Attorney Dkt #: | SSTC-32107 |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/23/2016
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Application #:
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14214800
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Filing Dt:
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03/15/2014
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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MEMORY CIRCUIT INCORPORATING ERROR DETECTION AND CORRECTION (EDAC), METHOD OF OPERATION, AND SYSTEM
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Assignee
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5918 WEST COURTYARD DRIVE, SUITE 330A |
AUSTIN, TEXAS 78730 |
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Correspondence name and address
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ANDREW C. GRAHAM
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P.O. BOX 741715
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DALLAS, TX 75374-1715
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