|
Total properties:
12
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
09694433
|
Filing Dt:
|
10/23/2000
|
|
Title:
|
SAVING POWER WHEN IN OR TRANSITIONING TO A STATIC MODE OF A PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10186314
|
Filing Dt:
|
06/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
SYSTEM FOR SIMPLIFYING THE PROGRAMMABLE MEMORY TO LOGIC INTERFACE IN FPGA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10287258
|
Filing Dt:
|
11/04/2002
|
|
Title:
|
METAL STACK FOR LOCAL INTERCONNECT LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10407802
|
Filing Dt:
|
04/04/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
ARCHITECTURE FOR PROGRAMMABLE LOGIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
10885356
|
Filing Dt:
|
07/06/2004
|
|
Title:
|
ERROR CORRECTION IN A CACHE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11169403
|
Filing Dt:
|
06/28/2005
|
|
Title:
|
METHOD AND SYSTEM FOR PROVIDING TRUSTED ACCESS TO A JTAG SCAN INTERFACE IN A MICROPROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
11241104
|
Filing Dt:
|
09/29/2005
|
|
Publication #:
|
|
Pub Dt:
|
01/25/2007
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR PROTECTING PROCESSORS FROM UNAUTHORIZED DEBUG ACCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
11894991
|
Filing Dt:
|
08/21/2007
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
|
Title:
|
TRANSITIONING TO AND FROM A SLEEP STATE OF A PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2009
|
Application #:
|
12033864
|
Filing Dt:
|
02/19/2008
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR PROTECTING PROCESSORS FROM UNAUTHORIZED DEBUG ACCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2010
|
Application #:
|
12544145
|
Filing Dt:
|
08/19/2009
|
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
|
Title:
|
PROVIDING TRUSTED ACCESS TO A JTAG SCAN INTERFACE IN A MICROPROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2016
|
Application #:
|
12987423
|
Filing Dt:
|
01/10/2011
|
|
Publication #:
|
|
Pub Dt:
|
05/05/2011
| | | | |
|
Title:
|
SAVING POWER WHEN IN OR TRANSITIONING TO A STATIC MODE OF A PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2017
|
Application #:
|
15241690
|
Filing Dt:
|
08/19/2016
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2016
| | | | |
|
Title:
|
SAVING POWER WHEN IN OR TRANSITIONING TO A STATIC MODE OF A PROCESSOR BY USING FEEDBACK-CONFIGURED VOLTAGE REGULATOR
|
|
