Patent Assignment Details
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Reel/Frame: | 016117/0799 | |
| Pages: | 3 |
| | Recorded: | 01/03/2005 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10927949
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Filing Dt:
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08/27/2004
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Publication #:
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Pub Dt:
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04/28/2005
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Title:
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Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor
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Assignee
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ST. MARTIN-STRASSE 53 |
81669 MUNCHEN, GERMANY |
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Correspondence name and address
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MAGINOT, MOORE & BECK
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HAROLD C. MOORE
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111 MONUMENT CIRCLE, SUITE 3000
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INDIANAPOLIS, IN 46204-5115
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