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Patent Assignment Details
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Reel/Frame:034925/0802   Pages: 3
Recorded: 02/10/2015
Attorney Dkt #:1026A-15-6
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 4
1
Patent #:
Issue Dt:
03/21/2000
Application #:
09342486
Filing Dt:
06/29/1999
Title:
IMAGE SENSOR HAVING SELF-ALIGNED SILICIDE LAYER
2
Patent #:
Issue Dt:
12/27/2011
Application #:
11835388
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/14/2008
Title:
SOLID STATE MEMORY DEVICE WITH PCI CONTROLLER
3
Patent #:
Issue Dt:
07/17/2012
Application #:
11835395
Filing Dt:
08/07/2007
Publication #:
Pub Dt:
02/14/2008
Title:
METHODS FOR ELIMINATING INTERMEDIATE BUSSING AND BRIDGING REQUIREMENTS BETWEEN A SOLID STATE MEMORY DEVICE WITH PCI CONTROLLER AND A MAIN SYSTEM BUS
4
Patent #:
Issue Dt:
07/14/2015
Application #:
13525781
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
10/04/2012
Title:
Methods for eliminating intermediate bussing and bridging requirements between a solid state memory device with PCI controller and a main system bus
Assignor
1
Exec Dt:
12/19/2014
Assignee
1
2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondence name and address
IP&T GROUP LLP
8230 LEESBURG PIKE
SUITE 650
VIENNA, VA 22182

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