Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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Reel/Frame: | 012802/0805 | |
| Pages: | 5 |
| | Recorded: | 06/14/2002 | | |
Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09118225
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Filing Dt:
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07/17/1998
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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DIGITAL CIRCUIT LAYOUT TECHNIQUES
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09470086
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Filing Dt:
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12/22/1999
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Title:
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LOGIC EQUIVALENCE LEVERAGED PLACEMENT AND ROUTING OF AN IC DESIGN
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09470540
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Filing Dt:
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12/22/1999
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Title:
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DIGITAL CIRCUIT LAYOUT TECHNIQUES USING CIRCUIT DECOMPOSITION AND PIN SWAPPING
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Assignee
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8005 S.W. BOECKMAN ROAD |
WILSONVILLE, OREGON 97070 |
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Correspondence name and address
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BLAKELY, SOKOLOFF, TAYLOR, ET AL.
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PAUL A. MENDONSA
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12400 WILSHIRE BOULEVARD
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SEVENTH FLOOR
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LOS ANGELES, CA 90025
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